Zobrazeno 1 - 10
of 40
pro vyhledávání: '"Shahab Ardalan"'
Autor:
Matthew Streshinsky, Lei Wang, Ari Novack, Yogi Ahuja, Rhys Manley, Patrick Maupin, Hao Wu, Jinghui Yang, Fen Guan, Romanas Narevich, Chris Horng, Noam Ophir, Jiahao Zhan, Jim Mali, Wuchun Wu, Katherine Roelofs, Yun Zhe Li, Vesselin Velev, Babak Behnia, Brian West, Artsroun Darbinian, Gabriel Thompson, George Zarris, Xavier Serey, Saman Jafarlou, Matthew Chang, Shahab Ardalan, Thomas Baehr-Jones
We demonstrate a transmitter and receiver in a silicon photonics platform for O-band optical communication that monolithically incorporates a modulator driver, traveling-wave Mach-Zehnder modulator, control circuitry, photodetector, and TIA in the Gl
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::2c949e8a3d30ab952609741775ddd2d5
https://doi.org/10.1364/opticaopen.22814837.v1
https://doi.org/10.1364/opticaopen.22814837.v1
Autor:
Bapiraju Vinnakota, Suresh Subramaniam, Ken Poulton, Shahab Ardalan, Ramin Farjadrad, Mark Kuemerle
Publikováno v:
IEEE Micro. 41:54-60
Bunch of wires (BoW) is a new open die-to-die (D2D) interface that aims to gracefully tradeoff performance for design and packaging complexity across a wide range of process nodes. BoW performance can range from 320 Gb/s/mm with a simple design and p
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1c5844abdf285c2e3db665d21cd56892
https://doi.org/10.1109/mm.2020.3040410
https://doi.org/10.1109/mm.2020.3040410
Autor:
Chen Li, David Kehlet, Allen Chan, Chong Zhang, Conor O'Keeffe, Roy Meade, Haiwei Lu, Pavan Bhargava, Mark T. Wade, Chen Sun, Sergey Y. Shumarayev, Tim Tri Hoang, Michael L. Davenport, Erik Anderson, Vladimir Stojanovic, Michael Rust, Forrest Sedgwick, Sidney Buchbinder, Matthew T. Guzy, John M. Fini, Derek Van Orden, Shahab Ardalan, Ravi Mahajan, Chandru Ramamurthy, Tina Tran
Publikováno v:
IEEE Micro. 40:63-71
In this article, we present TeraPHY, a monolithic electronic–photonic chiplet technology for low power and low latency, multi-Tb/s chip-to-chip communications. Integration of the TeraPHY optical technology with open source advanced interconnect bus
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::daca41f6c14386833c4ae6e8287fef9b
https://doi.org/10.1109/mm.2020.2976067
https://doi.org/10.1109/mm.2020.2976067
Publikováno v:
2021 IEEE 30th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6321c1f699118ce6a4043a01874c4270
https://doi.org/10.1109/epeps51341.2021.9609161
https://doi.org/10.1109/epeps51341.2021.9609161
Autor:
Chen Sun, Chen Li, Derek Van Orden, Behrooz Beheshtian, Chong Zhang, Pavan Bhargava, Haiwei Lu, Daniel Jeong, Michael Rust, Mason Zhang, Forrest Sedgwick, Woorham Bae, Shahab Ardalan, Chandarasekaran Ramamurthy, Mark T. Wade, Roy Meade, Erik Anderson, Sidney Buchbinder, Austin Katzin, John M. Fini, Anatoly Khilo, Vladimir Stojanovic, Byungchae Kim
Publikováno v:
VLSI Circuits
For the first time, we demonstrate an error-free, 128Gbps (8x16Gbps) optical transceiver using a microring-based wavelength-division multiplexed (WDM) architecture. The optical transceiver ran for 12 hours with zero errors, resulting in a measured bi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2d7c5203a9db0d2ef9c73760b17560ce
https://doi.org/10.23919/vlsicircuits52068.2021.9492382
https://doi.org/10.23919/vlsicircuits52068.2021.9492382
Autor:
Shahab Ardalan
A 1.2 V, 8 bit, 100 MSample/Sec Pipeline Analog-to-Digital Converter is designed in 0.18-μm standard CMOS technology. An emphasis was placed on observing the low voltage and low power design. The architecture of this ADC is 1 bit/stage pipelined con
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::359a761875bc22dbbf42c26b732f1557
https://doi.org/10.32920/ryerson.14647467
https://doi.org/10.32920/ryerson.14647467
A 0.8 V folded cascode operational amplifier was designed in 0.18 /spl mu/m standard CMOS technology. Emphasis was placed on observing the low voltage design and using a current driven bulk (CDB) technique to achieve this goal. The CDB technique was
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::30b85e0ee864763bf7e5e6e8044cc492
https://doi.org/10.32920/14638515
https://doi.org/10.32920/14638515
Autor:
M. Patel, C. Madden, J. Frey, U. Krishnamoorthy, Michael Rust, Pavan Bhargava, N. Chan, Songtao Liu, R. Roucka, Forrest Sedgwick, Mark T. Wade, H. Eachempatti, Austin Katzin, Erik Anderson, F. Luna, Sidney Buchbinder, Chen Li, D. Van Orden, John M. Fini, M. Sysak, Manan Raval, L. Okada, Mason Zhang, Chandarasekaran Ramamurthy, Shahab Ardalan, Chong Zhang, Anatoly Khilo, Haiwei Lu, R. Zeng, Woorham Bae, Derek M. Kita, K. Robberson, E. Jan, Behrooz Beheshtian, P. Chao, Roy Meade, Daniel Jeong, K. Chang, Vladimir Stojanovic, Byungchae Kim, Chen Sun
Publikováno v:
OFC
We demonstrate 128 Gbps/port (8-λ × 16 Gbps/λ) natively error-free transmission across eight optical ports using a 8-port, 8-λ/port WDM remote laser source and a pair of monolithically integrated CMOS optical I/O chiplets with 4.96-5.56 pJ/bit op
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f89c95579e1894371143e1d5a8686f12
https://doi.org/10.1364/ofc.2021.f3c.6
https://doi.org/10.1364/ofc.2021.f3c.6
Autor:
Mark Kuemerle, Ramin Farjad, Suresh Subramanian, Bapiraju Vinnakota, Ken Poulton, Halil Cirit, Shahab Ardalan
Publikováno v:
Hot Interconnects
Bunch of Wires (BoW) is a new open die-to-die (D2D) interface. BoW’s objective is to allow designers to gracefully trade-off performance for design and packaging complexity across a wide range of process nodes. BoW bandwidth can range from 80 Gbps
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::858b1b69a1c3ef2f010bdc3f387caf22
https://doi.org/10.1109/hoti51249.2020.00017
https://doi.org/10.1109/hoti51249.2020.00017
Autor:
Chong Zhang, Haiwei Lu, Woorham Bae, Mark T. Wade, Forrest Sedgwick, Pavan Bhargava, Erik Anderson, Sidney Buchbinder, Chen Li, Mason Zhang, Derek Van Orden, Vladimir Stojanovic, Shahab Ardalan, Michael Rust, Roy Meade, Behrooz Beheshtian, Chandarasekaran Ramamurthy, Chen Sun, Daniel Jeong, Austin Katzin, John M. Fini, Anatoly Khilo
Publikováno v:
2020 IEEE Symposium on VLSI Technology.
We demonstrate an electro-optic platform enabling a direct optical I/O interface in an ASIC package. The $5.5\mathrm{x}8.9\mathrm{mm}^{2}$ chiplet uses the Advanced Interface Bus (AIB), a parallel digital interface, to communicate to a host ASIC and
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::375b924c1bef7e11c732a46677a6b9e2
https://doi.org/10.1109/vlsitechnology18217.2020.9265012
https://doi.org/10.1109/vlsitechnology18217.2020.9265012