Zobrazeno 1 - 10
of 76
pro vyhledávání: '"Seung-Jun Bae"'
Publikováno v:
IEEE Transactions on Circuits and Systems II: Express Briefs. 68:2409-2413
A duo-binary signaling has been applied to both transmitter and receiver for high-speed low-power DRAM interface. The transmitter consists of a half-rate voltage-mode time-interleaved mixing duo-binary driver and a 2-tap feed-forward equalizer. The v
Publikováno v:
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE. 21:9-20
Autor:
Jeong-Don Ihm, Byongwook Na, Hye-In Choi, Kim Sang-Yun, Seung-Jun Bae, Jae-Hoon Jung, Jin-Seok Heo, Seung-Jun Lee, Dae Hyun Kim, Junghwan Park, Won-Il Bae, Ki-Han Kim, Seouk-Kyu Choi, Jin-Hun Jang, Hangi-Jung, Duk-ha Park, Jung-Bae Lee, Seungki Hong, Young-Il Lim, Isak Hwang, Dong-Hun Lee, Kyungryun Kim, Nam Sung Kim, Dae-Hyun Kwon, Chang-Kyo Lee, Dongkeon Lee, Hyung-Joon Chi, Geun-Tae Park
Publikováno v:
IEEE Journal of Solid-State Circuits. 56:212-224
An 8.5-Gb/s/pin (Gb/s) 12-Gb LPDDR5 SDRAM is implemented in a second-generation 10-nm DRAM process with a hybrid-bank architecture that provides a power-optimized bank solution depending on the bank modes (4B/4BG, 16B-merged bank, 8B-split bank). Bas
Autor:
Hyong-Ryol Hwang, Young-Soo Sohn, Young Hoon Son, Seungseob Lee, Seung-Jun Bae, Hyuck-Joon Kwon, Jung-Bae Lee, Byongwook Na, Chang-Kyo Lee, Young-Hwa Kim, Dongkeon Lee, Duk-ha Park, Daesik Moon, Kwang-Il Park, Tae-Young Oh, Youn-sik Park, Kyung-Soo Ha
Publikováno v:
IEEE Journal of Solid-State Circuits. 55:157-166
A 7.5 Gb/s/pin 8-Gb LPDDR5 SDRAM is implemented in a 1 $\times$ nm DRAM process. Various techniques are applied to achieve higher bandwidth and lower power than LPDDR4X. To increase data rate, a WCK clocking scheme that is less vulnerable to power no
Autor:
Seung-Jun Bae, Roberto Bez, Paolo Cappelletti, Paolo Fantini, Akira Goda, Laurent Grenouillet, Mark Helm, Gertjan Hemink, Daniele Ielmini, Dae-Hyun Kim, Hye-Jung Kwon, Gabriel Molas, Ravi Nair, Giacomo Pedretti, Fabio Pellizzer, Agostino Pirovano, Andrea Redaelli, Julien Ryckaert, Shairfe Muhammad Salahuddin, Jon Slaughter, Pieter Weckx, Jung Yoon
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3c26e7737255f61426bc3e4594ecb688
https://doi.org/10.1016/b978-0-12-820758-1.09988-x
https://doi.org/10.1016/b978-0-12-820758-1.09988-x
Publikováno v:
Electronics Letters. 56:1103-1105
This Letter presents a self-capacitance sensing (SCS) technique for touch screen panel with the alternating panel charge sharing (APCS) that effectively suppresses low-frequency noise and achieves a better signal-to-noise ratio (SNR). With the propos
Autor:
Chang-Yong Lee, Seung-Jun Bae, Jeong-Woo Lee, Seung-Hoon Oh, Yong-Hun Kim, Young-Soo Sohn, Gyo-Young Jin, Gong-Heum Han, Dong-seok Kang, Young-Hun Seo, Gun-hee Cho, Seung-Hyun Cho, Sam-Young Bang, Seong-Jin Jang, Youn-sik Park, Yong-Jun Kim, Kwang-Il Park, Jung-Hwan Choi, Seouk-Kyu Choi, Kyung-Bae Park, Sung-Geun Do, Young-Ju Kim, Keon-woo Park, Ji-Hak Yu, Jae-Sung Kim, Su-Yeon Doo, Jae-Koo Park, Chan-Yong Lee, Chang-Ho Shin, Hye-Jung Kwon, Byung-Cheol Kim, Hyuk-Jun Kwon, Sang-Sun Kim, Min-Su Ahn, Hyun-Soo Park, Chul-Hee Jeon, Lee Yong-Jae, Ki-Hun Yu, Sang-Yong Lee
Publikováno v:
IEEE Journal of Solid-State Circuits. 54:197-209
The graphic DRAM standard GDDR6 is developed to overcome the limitation of previous standards GDDR5/5X for achieving high-speed operation. This paper introduces 16-Gb GDDR6 DRAM with a per-bit trainable single-ended decision feedback equalizer (DFE),
Publikováno v:
ISSCC
Computation in memory (CIM) continues to diversify to cover various memory technologies using computations performed in different signal domains. This session covers CIM designs using ReRAM, eDRAM, and SRAM with computations in both analog and digita
Autor:
Seouk-Kyu Choi, Young-Kwan Kim, Seung-Jun Bae, Seung-Hyun Cho, Jae-Woo Jung, Dae Hyun Kim, Byung-Cheol Kim, Sung-Woo Yoon, Jae-Koo Park, Yong-Hun Kim, Si-Hyeong Cho, Jung-Bae Lee, Jinyong Choi, Dae-Hyun Kwon, Seong-hoon Kim, Chan-Young Kim, Byongwook Na, Yong-Jun Kim, Jae-Woo Lee, Dong-Yeon Park, Hye-In Choi, Reum Oh, Hyung-Jin Kim, Min-Su Ahn, Dongkeon Lee, Jihwa You, Nam Sung Kim, Jaemin Choi, Jun-Ho Kim, Jeong-Don Ihm, Hyung-Seok Cha, Kyoung-Ho Kim, Young-Jae Park, Min-Soo Jang
Publikováno v:
ISSCC
The demand for mobile DRAM has increased, with a requirement for high density, high data rates, and low-power consumption to support applications such as 5G communication, multiple cameras, and automotive. Thus, density has increased from 2Gb [1] to