Zobrazeno 1 - 10
of 19
pro vyhledávání: '"Serguei Okhonin"'
Publikováno v:
Microelectronic Engineering. 72:342-346
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::91a3750d66f5856fed13efb73beeb473
https://doi.org/10.1016/j.mee.2004.01.014
https://doi.org/10.1016/j.mee.2004.01.014
Autor:
Mikhail Nagoga, P. Fazan, Kristin De Meyer, Jean-Michel Sallese, Sorin Cristoloveanu, Serguei Okhonin, Hans Van Meer, J. Pontcharra, O. Faynot
Publikováno v:
Solid-State Electronics. 46:1709-1713
The transients in partially depleted (PD) silicon on insulator (SOI) MOSFETs produced with 0.25 and 0.13 μm technologies are studied. The exponential dependence of the switch-on transient time on the reciprocal drain voltage for both P- and N-channe
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7a9d90571ba80d639c26fe73a422da86
https://doi.org/10.1016/s0038-1101(02)00148-x
https://doi.org/10.1016/s0038-1101(02)00148-x
Autor:
Serguei Okhonin, J. Pontcharra, Sorin Cristoloveanu, Mikhail Nagoga, O. Faynot, P. Fazan, Jean-Michel Sallese
Publikováno v:
Microelectronic Engineering. 59:469-473
We investigated the transients in 0.25 μm PD SOI devices. A good agreement between experimental and simulation results has been observed. The exponential dependence of the switch-on transient time on the reciprocal drain voltage for both p- and n-ch
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::93dbcaa47b988c82ae2ff7f2c5db71e0
https://doi.org/10.1016/s0167-9317(01)00645-1
https://doi.org/10.1016/s0167-9317(01)00645-1
Publikováno v:
Microelectronics Reliability. 36:1671-1674
By relating the complete spatial interface trap profile to the variation of electrical parameters in n-channel LDD and FOND MOSFET's, we clarify the respective role of defects above the channel and the LDD region. We show that the saturation of the s
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::cd19bf84a24c82b32ab33342e1c00b69
https://doi.org/10.1016/0026-2714(96)00171-0
https://doi.org/10.1016/0026-2714(96)00171-0
Publikováno v:
Microelectronic Engineering. 28:261-264
The feasibility of extracting the spatial distribution of interface traps from forward gate-induced drain leakage (GIDL) measurements on submicron MOSFET's is demonstrated. The results of this technique are similar to those of the charge pumping (CP)
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::cd373e743034a6d78ef99faf4f022a34
https://doi.org/10.1016/0167-9317(95)00055-d
https://doi.org/10.1016/0167-9317(95)00055-d
Publikováno v:
IEEE Electron Device Letters. 23:279-281
A new method to determine the interface trap density in partially depleted silicon-on-insulator (SOI) floating body MOSFETs is proposed for the first time. It can be considered as a "transient" charge-pumping (CP) technique in contrast to the normall
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2c915738d4039e050b68ae24e34cf217
https://doi.org/10.1109/55.998876
https://doi.org/10.1109/55.998876
Publikováno v:
IEEE Electron Device Letters. 23:85-87
A simple true 1 transistor dynamic random access memory (DRAM) cell concept is proposed for the first time, using the body charging of partially-depleted SOI devices to store the logic "1" or "0" binary states. This cell is two times smaller in area
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6a07d2f5182ac3a216aaffd286c1ad2b
https://doi.org/10.1109/55.981314
https://doi.org/10.1109/55.981314
Autor:
Isabelle Ferain, Jean-Pierre Colinge, Ran Yu, Mikhail Nagoga, Abhinav Kranti, N. Dehdashti Akhavan, Christopher W. Lee, Serguei Okhonin, Ran Yan, Pedram Razavi
Publikováno v:
Extended Abstracts of the 2010 International Conference on Solid State Devices and Materials.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a1ede410a61d4ceb07d28f831f0e5166
https://doi.org/10.7567/ssdm.2010.e-1-2
https://doi.org/10.7567/ssdm.2010.e-1-2
Publikováno v:
2008 IEEE International SOI Conference.
The leakage current of SOI based Floating Body Memory (FBM) has been modeled. The model takes into account oxide/SOI interface traps (Dit) and Electric Field Enhanced (EFE) generation of electron hole pairs (EHPs) from trap states via the Poole-Frenk
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a247b97c0a14ee4685d4c9b541e76d7c
https://doi.org/10.1109/soi.2008.4656301
https://doi.org/10.1109/soi.2008.4656301
Publikováno v:
2007 IEEE International Electron Devices Meeting.
A new generation of the single transistor floating body DRAM is introduced for the first time. The new memory is largely based on the bipolar transistor existing in the MOS structure. The memory's main features are high margin, low-power consumption,
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::afbe82f8ace6cf12b36578605ccaca3f
https://doi.org/10.1109/iedm.2007.4419103
https://doi.org/10.1109/iedm.2007.4419103