Výsledky vyhledávání - "Sergey Smolov"

Extracting Assertions for Conflicts in HDL Descriptions

Autor: Sergey Smolov, A.S. Kamkin, M.S. Lebedev

Publikováno v: Труды Института системного программирования РАН, Vol 31, Iss 3, Pp 135-144 (2019)

Data access conflicts may arise in hardware designs. One of the ways of detecting such conflicts is static analysis of hardware descriptions in HDL. We propose a static analysis-based approach to data conflicts extraction from HDL descriptions. This

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::38c3e15d6890599fe672b05290f2b34b
https://doi.org/10.15514/ispras-2019-31(3)-11

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Tools for Functional Verification of Microprocessors

Autor: Sergey Smolov, A. Sortov, Andrei Tatarnikov, Artem Kotsynyak, Mikhail Chupilko, Alexander Kamkin

Publikováno v: Труды Института системного программирования РАН, Vol 26, Iss 1, Pp 149-200 (2018)

Ensuring the correctness of microprocessors and other microelectronic equipment is a fundamental problem. To deal with it, various tools for functional verification are used. Unlike bugs in software programs which are relatively easy to fix (it does

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::d0d3a0546ac4839671d1627831e5a691
https://ispranproceedings.elpub.ru/jour/article/view/771

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Test Generation for Digital Hardware Based on High-Level Models

Autor: M.S. Lebedev, A.S. Kamkin, M M Chupilko, Sergey Smolov

Publikováno v: Труды Института системного программирования РАН, Vol 29, Iss 4, Pp 247-256 (2018)

Hardware testing is a process aimed at detecting manufacturing faults in integrated circuits. To measure test quality, two main metrics are in use: fault detection abilities (fault coverage) and test application time (test length). Many algorithms ha

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::d45509f886515383a8d3ce7c1ca9d50e
https://doi.org/10.15514/ispras-2017-29(4)-16

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Test Program Generator MicroTESK for RISC-V

Autor: Mikhail Chupilko, Alexander Protsenko, Sergey Smolov, Andrei Tatarnikov, Artem Kotsynyak, Alexander Kamkin

Publikováno v: MTV

The paper presents a test program generator for functional verification of RISC-V microprocessors. The generator is implemented on the base of MicroTESK framework and consists of formal specifications of RISC-V ISA and ISA-independent core. The speci

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::cb3ad375464f9eaec19a895d77d02209
https://doi.org/10.1109/mtv.2018.00011

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Maintaining ISA Specifications in MicroTESK Test Program Generator

Autor: Mikhail Chupilko, Sergey Smolov, Artem Kotsynyak, Alexander Kamkin, Andrei Tatarnikov, Alexander Protsenko

Publikováno v: MTV

The specification-based approach is widely used for test program generation for functional verification of microprocessors. The size of microprocessor specifications is measured in thousands lines of code. Consequently, their maintenance requires sig

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::030c5e437c137700f7e433e6f565da81
https://doi.org/10.1109/mtv.2017.13

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Extensible environment for test program generation for microprocessors

Autor: Andrei Tatarnikov, T. I. Sergeeva, Sergey Smolov, Alexander Kamkin, Mikhail Chupilko

Publikováno v: Programming and Computer Software. 40:1-9

Development of test programs and analysis of the results of their execution is the basic approach to verification of microprocessors at the system level. There is a variety of methods for the automation of test generation, starting with the generatio

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::f3d199e7938faa75cad9e2e1d551ed22
https://doi.org/10.1134/s0361768814010046

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An EFSM-driven and model checking-based approach to functional test generation for hardware designs

Autor: Mikhail V. Lebedev, Alexander Kamkin, Sergey Smolov

Publikováno v: EWDTS

This paper describes a model-based functional test generation method for hardware designs. The main principles are as follows. Two models are extracted from an HDL description: a functional model, which represents the design under scrutiny, and a cov

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::278c581c7e2a107a056bc4deffc90b83
https://doi.org/10.1109/ewdts.2016.7807736

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Specification-Based Test Program Generation for ARM VMSAv8-64 Memory Management Units

Autor: Alexander Kamkin, Alexander Protsenko, Mikhail Chupilko, Sergey Smolov, Andrei Tatarnikov, Artem Kotsynyak

Publikováno v: MTV

In this paper, a tool for automatically generating test programs for ARM VMSAv8-64 memory management units is described. The solution is based on the MicroTESK framework being developed at ISP RAS. The tool consists of two parts: an architecture-inde

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::99bad26d085864fd12daa33742dec3f4
https://doi.org/10.1109/mtv.2015.13

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Static analysis of HDL descriptions: Extracting models for verification

Autor: Alexander Kamkin, Igor Melnichenko, Sergey Smolov

Publikováno v: EWDTS

The increasing complexity of hardware designs makes functional verification a challenge. The key issue of the state-of-the-art verification approaches is to obtain a “good” model for automated test generation or formal property checking. In this

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::1073c8aa165ac98a7c88db0577ef3470
https://doi.org/10.1109/ewdts.2013.6673126

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