Zobrazeno 1 - 10
of 22
pro vyhledávání: '"Sergei Sawitzki"'
Autor:
S. Schulze, Sergei Sawitzki
Publikováno v:
Microprocessors and Microsystems. 36:676-694
This contribution documents the development, implementation, and verification of a RISC microprocessor using the functional hardware description language Lava. Basic methods to describe hardware in Lava are introduced and extended towards implementat
Publikováno v:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 18:794-807
Viterbi algorithm is widely used as a decoding technique for convolutional codes as well as a bit detection method in storage devices. The design space for VLSI implementation of Viterbi decoders is huge, involving choices of throughput, latency, are
Publikováno v:
IEEE Transactions on Circuits and Systems II: Express Briefs, 55(3), 284-288. Institute of Electrical and Electronics Engineers
One of the key features of a modern mobile terminal is the simultaneous support of multiple/different transmission standards. Most of these standards include forward error correction decoding functionality. In this overview paper we review the possib
Autor:
Sergei Sawitzki, Timm Bostelmann
Publikováno v:
FPL
In this work we present a concept of an architecture design flow for heterogeneous reconfigurable architectures. We have a special focus on high flexibility regarding the architecture design. We cover architectures from fine-grained island-style FPGA
Autor:
Timm Bostelmann, Sergei Sawitzki
Publikováno v:
2015 Austrian Workshop on Microelectronics.
In this paper we present a heterogeneous architecture template for reconfigurable logic and its proposed design flow. From this template which we also call a meta-architecture a set of reconfigurable architectures can be derived and optimized towards
Autor:
Timm Bostelmann, Sergei Sawitzki
Publikováno v:
ReConFig
In this paper we present a concept of a reconfigurable logic toolchain. The specialty of this toolchain is the highly configurable architecture design. The goal is to provide the designer with the ability to suit the architecture of the reconfigurabl
Autor:
Sergei Sawitzki, Timm Bostelmann
Publikováno v:
ReConFig
This work shows how the results of netlist placement for island style FPGAs can be improved by the use of a self-organizing map. The structural information of a netlist is used to generate training vectors, which are classified by a self-organizing m
Autor:
Stefan Schulze, Sergei Sawitzki
Publikováno v:
Lecture Notes in Computer Science ISBN: 9783642194740
ARC
ARC
This paper documents the development, implementation, and verification of a RISC microprocessor using the functional hardware description language Lava. Basic methods to describe hardware in Lava are introduced and extended towards implementation of
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::260f60d0bb15c7be1b1480ed4fac36e3
https://doi.org/10.1007/978-3-642-19475-7_17
https://doi.org/10.1007/978-3-642-19475-7_17
Publikováno v:
Series on Integrated Circuits and Systems ISBN: 9781402099182
During the last decade we have witnessed a proliferation of transmission standards for wireless communication. This holds for cellular communication, but also for broadcast and connectivity standards. All these transmission standards employ an FEC co
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9fc508dbf4a88e6c241831ec0068008b
https://doi.org/10.1007/978-1-4020-9917-5_12
https://doi.org/10.1007/978-1-4020-9917-5_12
Publikováno v:
Architecture of Computing Systems – ARCS 2008 ISBN: 9783540781523
ARCS
ARCS
A novel routing fabric is introduced that offers high flexibility at significantly lower silicon cost compared to routing fabrics currently incorporated in Field Programmable Gate Array (FPGA) devices, IP cores, and IP-core wrappers. This fabric is e
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2769d724ac560db6caf10a2f105bd0d8
https://doi.org/10.1007/978-3-540-78153-0_12
https://doi.org/10.1007/978-3-540-78153-0_12