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pro vyhledávání: '"Seonwoo Yeom"'
Publikováno v:
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE. 21:68-72
Publikováno v:
IEEE Transactions on Circuits and Systems I: Regular Papers. 67:3718-3727
This article presents an ultra-low power counter structure for a column-parallel single-slope analog-to-digital converter (SS-ADC) in CMOS image sensors. The proposed counter employs a two-step logical shift algorithm-based correlated double sampling