Zobrazeno 1 - 10
of 15
pro vyhledávání: '"Seonhaeng Lee"'
Autor:
Jun Hui Park, Jung Nam Kim, Seonhaeng Lee, Gang-Jun Kim, Namhyun Lee, Rock-Hyun Baek, Dae Hwan Kim, Changhyun Kim, Myounggon Kang, Yoon Kim
Publikováno v:
IEEE Access, Vol 12, Pp 23881-23886 (2024)
Accurate current-voltage (I-V) modeling based on the Berkeley short-channel insulated-gate field-effect transistor model (BSIM) is pivotal for integrated circuit simulation. However, the current BSIM model does not support a buried-channel-array tran
Externí odkaz:
https://doaj.org/article/be40799b6d1e4e5da92ee9cb9d41dd5d
Autor:
Hyunseo You, Kihoon Nam, Jehyun An, Chanyang Park, Donghyun Kim, Seonhaeng Lee, Namhyun Lee, Rock-Hyun Baek
Publikováno v:
IEEE Access, Vol 12, Pp 10988-10994 (2024)
This study investigated a novel forward body bias (FBB) analysis to optimize the threshold voltage ( $\text{V}_{\mathrm {th}}$ ) at cryogenic temperatures in the latest dynamic random-access memory (DRAM). Electrical measurements were conducted to an
Externí odkaz:
https://doaj.org/article/0d98260d7f88492fb8965b2bee05a9ea
Autor:
Hyunseo You, Jehyun An, Kihoon Nam, Bohyeon Kang, Jongseo Park, Namhyun Lee, Seonhaeng Lee, Rock-Hyun Baek
Publikováno v:
2023 7th IEEE Electron Devices Technology & Manufacturing Conference (EDTM).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9f3000f7ca23a61b42b6c85f23f40adb
https://doi.org/10.1109/edtm55494.2023.10102979
https://doi.org/10.1109/edtm55494.2023.10102979
Publikováno v:
International Journal of Highway Engineering. 20:1-9
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9a24e2913b4a7a0beb5e5f9dab501163
https://doi.org/10.7855/ijhe.2018.20.3.001
https://doi.org/10.7855/ijhe.2018.20.3.001
Publikováno v:
Solid-State Electronics. 167:107783
The method of fluorine implant directly after a poly gate deposition process step is proposed to improve both electrical characteristics and reliabilities by creating Si-F bonding at a gate oxide interface and negative fixed charged in a gate oxide.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ce0c854515a39f544d5ee06d7b64ee10
https://doi.org/10.1016/j.sse.2020.107783
https://doi.org/10.1016/j.sse.2020.107783
Autor:
Donghee Son, Hyeokjin Kim, Seonhaeng Lee, Cheolgyu Kim, Ji-Hoon Seo, Bongkoo Kang, Gang-Jun Kim
Publikováno v:
Microelectronics Reliability. 53:1351-1354
The effect of a low stress voltage on the negative bias temperature instability degradation in a nanoscale p -channel metal–oxide–semiconductor field-effect transistor using high- k /metal gate stacks is investigated. The direct current–current
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::61ba964f9514fa26f3b2b0a64280a1fc
https://doi.org/10.1016/j.microrel.2013.07.026
https://doi.org/10.1016/j.microrel.2013.07.026
Autor:
Jeongsoo Park, Chiho Lee, Cheolgyu Kim, Dongwoo Kim, Nam-Hyun Lee, Seonhaeng Lee, Gang-Jun Kim, Bongkoo Kang
Publikováno v:
Microelectronics Reliability. 52:1905-1908
The effect of electron–electron scattering (EES) on a nanoscale n-channel metal–oxide–semiconductor field-effect transistor was investigated. Experimental results indicate that EES stress creates more interface states and negative oxide charges
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7f642ff374142cdacf877bcb01b61af0
https://doi.org/10.1016/j.microrel.2012.06.138
https://doi.org/10.1016/j.microrel.2012.06.138
Publikováno v:
Microelectronics Reliability. 52:1949-1952
Channel width dependence of mechanical stress effects on a nanoscale n -channel metal–oxide-semiconductor field-effect transistor using the shallow trench isolation (STI) is investigated. The results indicate that the mechanical stress induced by t
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::25cca85bafa29bcaa3d8ae221a68597c
https://doi.org/10.1016/j.microrel.2012.06.067
https://doi.org/10.1016/j.microrel.2012.06.067
Publikováno v:
Microelectronics Reliability. 52:1901-1904
Enhanced degradation of n-MOSFETs with high-k/metal gate stacks under CHC/GIDL alternating stress is investigated. CHC stress generates negative oxide charges while GIDL stress generates positive oxide charges in the gate oxide near drain region. The
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7956a29d0ab7eddc0b8e6280cb2d6c2e
https://doi.org/10.1016/j.microrel.2012.06.011
https://doi.org/10.1016/j.microrel.2012.06.011
Autor:
S. J. Hong, Cheolgyu Kim, Seonhaeng Lee, Dongwoo Kim, Seon-Yong Cha, Bongkoo Kang, Tae-Kyung Oh
Publikováno v:
Microelectronic Engineering. 91:44-49
Methods of measuring mechanical stresses which are induced by hybrid shallow-trench-isolation (STI) for dynamic random access memories (DRAMs) using recess channel array transistor (RCAT) structure, are investigated. The STI was fabricated using high
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a875754ffef58fc55aa502a8d75716a1
https://doi.org/10.1016/j.mee.2011.10.015
https://doi.org/10.1016/j.mee.2011.10.015