Zobrazeno 1 - 10
of 22
pro vyhledávání: '"SeogMoon Choi"'
Publikováno v:
IEEE Transactions on Components, Packaging and Manufacturing Technology. 2:625-633
Nowadays, major trends in the design of electronic products are toward multifunction and miniaturization. To meet these trends, system-in-package (SiP) has been adapted as one of the core packaging technologies for many product applications. Among th
Publikováno v:
Journal of Microelectronics and Electronic Packaging. 3:67-72
A new light-emitting diode (LED) package module based on anodized circuit board (ACB) is developed in this study. ACB represents the selectively anodized aluminum board, in which the aluminum oxide layer, formed by anodizing process, serves as a diel
Publikováno v:
2011 IEEE 61st Electronic Components and Technology Conference (ECTC).
Recently, the electronic components have been developed to be small and multifunctional. To meet this trend, system-in-Package (SiP) has been adapted as one of the core packaging technologies for many product applications. Among various types of SiPs
Autor:
Gabor Farkas, Zoltan Sarkany, Jongman Kim, Shan Gao, Andras Vass-Varnai, Marta Rencz, Seogmoon Choi, Andras Poppe
There are several ways to define the junction-to-case thermal resistance; however, it is rather challenging to characterize the heat-flow in a package by a single number in an accurate and reproducible way. For many power package families such as TO-
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::38f1feef8479008710e9cdee4000f1c7
Publikováno v:
2008 33rd IEEE/CPMT International Electronics Manufacturing Technology Conference (IEMT).
Work on the Pulse Laser Deposition (PLD) equipment is purely for research and development at Samsung Electro-Mechanics when it takes 30 minutes to complete the experiment to grow a dielectric thin film on Cu plated pieces of Si wafer. At SEMCO, low t
Reliability evaluation and structure design optimization of Wafer Level Chip Scale Packaging (WLCSP)
Publikováno v:
2008 2nd Electronics Systemintegration Technology Conference.
In this study a WLCSP structure in microelectronic application is considered. In the current development of WLCSP solder post is used to bridge the die and solder bump to release part of the stress concentration caused by mismatch of Thermal Expansio
Publikováno v:
2008 2nd Electronics Systemintegration Technology Conference.
WL-CSP (wafer level - chip scale package) has many advantages such as low cost, easy fabrication and ultimate miniature size, even though solder joint reliability (SJR) of conventional WL-CSP is critical weak point of the technology. Therefore, many
Publikováno v:
2008 58th Electronic Components and Technology Conference.
In this study, high brightness LED package is considered. Steady state heat transfer process analysis is firstly carried out using 3-D finite element method. Temperature distribution and thermal resistance of the package are then determined. The FEM
Publikováno v:
2007 International Conference on Electronic Materials and Packaging.
In this study, the warpage of WLAN strip after reflow process, which contains 7times5 WLAN modules, is considered. 3D thermo-mechanical FEM simulation is carried out to find out the warpage distribution and maximum warpage after reflow process. Exper
Publikováno v:
2007 8th International Conference on Electronic Packaging Technology.
System in package (SiP) has the ability to integrate other components, such as passive component and antenna, into a single package to realize complete system functions. However, there are many electrical and mechanical reliability issues including t