Zobrazeno 1 - 10
of 16
pro vyhledávání: '"Seog-Jun Lee"'
Publikováno v:
Journal of the Korean Society of Manufacturing Process Engineers. 13:83-88
FSI (Fluid Structure Interaction) method, in this study, has been applied to analyzing thermal characteristics of a high speed machine tool spindle system. The spindle is composed of angular contact ceramic ball bearings, a high speed built-in motor,
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::68625583ca68a35d0551551f0697aba4
https://doi.org/10.14775/ksmpe.2014.13.3.083
https://doi.org/10.14775/ksmpe.2014.13.3.083
Publikováno v:
The Journal of Information Systems. 22:105-129
Recently, since the interest with well-being has been getting higher than ever, people want reliable source of information related with health and medical treatment. Because of the characteristics of information related with medical care, there have
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4389a7dfd232ac20c1e414c19d7fe9ff
https://doi.org/10.5859/kais.2013.22.2.105
https://doi.org/10.5859/kais.2013.22.2.105
Publikováno v:
The Journal of Information Systems. 21:1-25
In the field of education in Korea, University Information Disclosure System was conducted forcibly in December 2008 by Ministry of Education, Science and Technology. As a result, information quality provided to the user has been improved dramaticall
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d262b00cf3752e5db3f4f5b97c140ae9
https://doi.org/10.5859/kais.2012.21.2.1
https://doi.org/10.5859/kais.2012.21.2.1
Autor:
Young-Shig Choi, Seog-Jun Lee
Publikováno v:
IEEE Transactions on Consumer Electronics. 45:1183-1189
This paper describes a single chip DVB/DSS compliant receiver that integrates a variable rate QPSK demodulator with a 6-bit A/D converter, a Viterbi decoder, a deinterleaver, and a Reed-Solomon decoder. Using a fixed rate-sampling clock it handles a
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f6500315d8f7a100bc9b92b19fe023f5
https://doi.org/10.1109/30.809206
https://doi.org/10.1109/30.809206
A fully integrated low-noise 1-GHz frequency synthesizer design for mobile communication application
Publikováno v:
IEEE Journal of Solid-State Circuits. 32:760-765
This paper describes a fully monolithic phase-locked loop (PLL) frequency synthesizer circuit implemented in a standard 0.8-/spl mu/m CMOS technology. To be immune to noise, all the circuits in the synthesizer use differential schemes with the digita
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::77e2e68e2d5587ae98c59d2eb86cb073
https://doi.org/10.1109/4.568848
https://doi.org/10.1109/4.568848
Publikováno v:
IEEE Journal of Solid-State Circuits. 31:1267-1276
A novel logic family, called charge recycling differential logic (CRDL), has been proposed and analyzed. CRDL reduces power consumption by utilizing a charge recycling technique with the speed comparable to those of conventional dynamic logic circuit
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::aa6fdda0892d6a400e38db4293d6450a
https://doi.org/10.1109/4.535410
https://doi.org/10.1109/4.535410
Publikováno v:
IEEE Journal of Solid-State Circuits. 32:289-291
A high-speed ring oscillator is proposed for improved operation frequency over those based on the conventional n-stage inverter chain. The ring oscillator consists of inverters with negative delay elements that are derived from the ring oscillator ci
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::221ada87b7b8d1dd49589adf7a5e1df8
https://doi.org/10.1109/4.551926
https://doi.org/10.1109/4.551926
Publikováno v:
1996 Symposium on VLSI Circuits. Digest of Technical Papers.
A fully monolithic PLL frequency synthesizer circuit implemented in a 0.8 /spl mu/m CMOS technology is presented. The measured result shows a frequency range of 700 MHz to 1 GHz with -100 dBc/Hz phase noise at a 1 MHz carrier offset. The test chip co
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::14e1914414ad64dab52c44577d6eca3c
https://doi.org/10.1109/vlsic.1996.507714
https://doi.org/10.1109/vlsic.1996.507714
Publikováno v:
1996 IEEE International Solid-State Circuits Conference. Digest of TEchnical Papers, ISSCC.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::67ed561150c86c905ec7887078993265
https://doi.org/10.1109/isscc.1996.488628
https://doi.org/10.1109/isscc.1996.488628
Publikováno v:
IEEE Journal of Solid-State Circuits; 1997, Vol. 32 Issue 5, p760-765, 6p