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pro vyhledávání: '"Seng-Pan Ben U"'
Autor:
Seng-Pan Ben U
Publikováno v:
IEEE Solid-State Circuits Magazine. 9:44-49
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0354c633c1f2044c32ad753e19eb355a
https://doi.org/10.1109/mssc.2016.2623086
https://doi.org/10.1109/mssc.2016.2623086
Autor:
Seng-Pan Ben U, Chi-Hang Chan, Arshad Hussain, Franco Maloberti, Sai-Weng Sin, Rui P. Martins
Publikováno v:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 25:364-374
This paper discusses the use of a low gain amplifier and a passive switched-capacitor (SC) network to enable the SC integrator function. The method is applied to a delta-sigma modulator to achieve high resolution as proved by the 65-nm CMOS technolog
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a8f28906a27f8bd02ba0d13de633ea86
https://doi.org/10.1109/tvlsi.2016.2580712
https://doi.org/10.1109/tvlsi.2016.2580712
Publikováno v:
IEEE Journal of Solid-State Circuits. 51:365-377
This paper presents a $4 \times $ time-interleaved 6-bit 5 GS/s 3 b/cycle SAR analog-to-digital converter (ADC). Hardware overhead induced by a 3 b/cycle architecture is eased by an interpolation technique where around 1/3 of the hardware is saved. I
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::098574025dfea9b9ae2ee35b2cd4efd2
https://doi.org/10.1109/jssc.2015.2493167
https://doi.org/10.1109/jssc.2015.2493167
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