Zobrazeno 1 - 4
of 4
pro vyhledávání: '"Seiichi Umai"'
Autor:
Keiichi Higeta, Yuichi Ito, Norio Nakajima, Takashi Kawamoto, Masatoshi Hasegawa, Tomofumi Hokari, Seiichi Umai, Masatoshi Tsuge, Kenji Kogo, Junya Nasu, Tatsunori Usugi, Tsuneo Kawamata, Fumio Yuki, Takayasu Norimatsu, Takemasa Komori, Takashi Muto, Hideki Koba, Takeo Yamashita, Naohiro Kohmu
Publikováno v:
ISSCC
The amount of data traffic is increasing year by year as the number of data-rich services like cloud services and streaming services are increasing. The number of switch modules between servers should decrease to lower latency, and several servers in
Autor:
Shinji Nishimura, Ryo Nemoto, Noboru Masuda, Takashi Muto, Goichi Ono, Tatsuya Saito, Seiichi Umai, Fumio Yuki, Masashi Kono, Hiroki Yamashita, Masayoshi Yagyu, Takashi Takemoto, Koji Fukuda, Akihiro Kambe, Hidehiro Toyoda, K. Watanabe, Eiichi Suzuki
Publikováno v:
ISSCC
The 100-gigabit Ethernet (100GbE) was standardized as IEEE 802.3ba in 2010 [1]. The optics module must be equipped with a “gearbox” LSI-which switches between 10×10Gb/s data signals on the physical-coding-sublayer side and 4×25Gb/s data signals
Autor:
Keiichi Higeta, Fumio Yuki, Yuichi Ito, Takashi Kawamoto, Takayasu Norimatsu, Kenji Kogo, Tsuneo Kawamata, Tatsunori Usugi, Tomofumi Hokari, Takemasa Komori, Junya Nasu, Jun Kumazawa, Takashi Muto, Hiroaki Kurahashi, Takeo Yamashita, Hideki Koba, Norio Nakajima, Seiichi Umai, Masatoshi Hasegawa, Masatoshi Tsuge
Publikováno v:
ISSCC
As processing and network speeds are accelerated to support data-rich services, the bandwidth of backplane interconnects needs to be increased while maintaining the channel length and multi-rate links. However, channel losses and impedance discontinu
Autor:
Ryo Nemoto, Fumio Yuki, Hiroki Yamashita, Masayoshi Yagyu, Noboru Masuda, Hidehiro Toyoda, Takashi Muto, Tatsuya Saito, Koji Fukuda, Seiichi Umai, Shinji Nishimura, Takashi Takemoto, Goichi Ono, K. Watanabe, Masashi Kono, Eiichi Suzuki, Akihiro Kambe
Publikováno v:
2011 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS).
The world's first CMOS "gearbox LSI" based on 65-nm CMOS technology-namely, a 2-W 100-gigabit-Ethernet gearbox LSI combining a 10:4 multiplexer and a 4:10 demultiplexer-was developed. Its power consumption is 75% lower than that of a conventional SiG