Zobrazeno 1 - 10
of 22
pro vyhledávání: '"Se-Jung Moon"'
Publikováno v:
2021 IEEE International Joint EMC/SI/PI and EMC Europe Symposium.
When PCIe 5.0 CEM connector testing result came out differently depending on the 2X-Thru de-embedding tools, we performed the tool accuracy test adopting the IEEE 370 specification and the framework. The key to success in this test was to ensure that
Autor:
Chien-Ping Kao, Guo Jong-Ru, Jianting Li, Beomtaek Lee, Se-Jung Moon, Xinjun Zhang, Hansel Dsilva
Publikováno v:
2021 IEEE 25th Workshop on Signal and Power Integrity (SPI).
In the high-speed differential (HSD) interface design, the intra-pair skew becomes more critical as the link speed is ever increasing beyond 56Gbps+ signaling. The skew within a differential pair (intra-pair skew) deteriorates eye opening at the rece
Publikováno v:
2021 IEEE 25th Workshop on Signal and Power Integrity (SPI).
PCI SIG (peripheral component interconnect special interest group) adapted the ccICN (component contribution integrated crosstalk noise) for PCIe CEM (card electromechanical) specification in limiting the connector crosstalk for 32Gbps NRZ (non-retur
Publikováno v:
2019 IEEE 28th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS).
In this work, we apply electromagnetic domain decomposition (EDD) to separate through-hole mounting (THM) connector models into two sub-domains: the connector body and the PCB section. The sub-domain models were simulated and then concatenated in ord
Publikováno v:
2019 IEEE International Symposium on Electromagnetic Compatibility, Signal & Power Integrity (EMC+SIPI).
High-speed VNA pico-probe calibration can be a very tedious process and is one of the most important and time consuming parts of collecting good S-parameter data. When performing multi-port probe calibrations using a calibration substrate, an operato
Publikováno v:
2019 IEEE International Symposium on Electromagnetic Compatibility, Signal & Power Integrity (EMC+SIPI).
For successful high-speed system design, accurate component characterization is essential. The component is often mounted on a printed circuit board (PCB) for the characterization. The removal of the fixture parasitic effects is critical. The fixture
Publikováno v:
2017 IEEE International Symposium on Electromagnetic Compatibility & Signal/Power Integrity (EMCSI).
In today's high-speed interconnect design, crosstalk is a critical parameter and the accurate measurement is very important. However, in the calibration procedure, the fixture crosstalk is usually ignored to avoid over-complicated de-embedding algori
Publikováno v:
2015 IEEE Symposium on Electromagnetic Compatibility and Signal Integrity.
In this paper, TRL (Through-Reflect-Multiple Lines) and 2x thru de-embedding schemes of AFR (Automatic Fixture Removal) and SFD (Smart Fixture De-embedding) are compared from various perspectives: calibration fixture design, calibration / de-embeddin
Publikováno v:
2011 IEEE 20th Conference on Electrical Performance of Electronic Packaging and Systems.
This paper proposes new frequency-domain (FD) metrics to evaluate and optimize interconnects for high-speed IO. In this paper, we focused on a spring-probe socket for interconnects and PCIe Gen3 for the high-speed IO. For design optimization, we adap
Publikováno v:
2010 IEEE International Symposium on Electromagnetic Compatibility.
The time-domain vector fitting (TDVF) [1] was proven to be an extrapolation method which provides about a ten-fold lengthening of a recorded time-domain response and reducing Gribbs phenomenon due to the limited length of the response and its abrupt