Zobrazeno 1 - 10
of 12
pro vyhledávání: '"Scan Encryption"'
Autor:
Sophie Dupuis, H. El Badawi, Laurent Latorre, Mariane Comte, Bruno Rouzeyre, T. Vayssadel, Arnaud Virazel, Marie-Lise Flottes, François Lefèvre, Vincent Kerzérho, Florence Azaïs, Emanuele Valea, Patrick Girard, B. Deveautour, Serge Bernard
Publikováno v:
IOLTS
26th International Symposium on
Testing and Robust System Design (IOLTS)
Testing and Robust System Design (IOLTS), Jul 2020, Napoli, Italy. pp.1-4, ⟨10.1109/IOLTS50870.2020.9159723⟩
26th International Symposium on
Testing and Robust System Design (IOLTS)
Testing and Robust System Design (IOLTS), Jul 2020, Napoli, Italy. pp.1-4, ⟨10.1109/IOLTS50870.2020.9159723⟩
International audience; Systems on a chip have seen their surface area increased by a factor of 10 and their consumption multiplied by 5 during the last ten years. Each technological node that enabled this integration has also added new constraints c
Conference
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Publikováno v:
8th Workshop on Trustworthy Manufacturing and Utilization of Secure Devices (TRUDEVICE)
8th Workshop on Trustworthy Manufacturing and Utilization of Secure Devices (TRUDEVICE), May 2019, Baden Baden, Germany
8th Workshop on Trustworthy Manufacturing and Utilization of Secure Devices (TRUDEVICE), May 2019, Baden Baden, Germany
International audience; IEEE test standards have been developed in order to sustain the deployment of complex test infrastructures inside modern Integrated Circuits (IC). Security is a primary issue in test infrastructures. For instance, confidential
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=dedup_wf_001::9e86f8af672c83da2dc200b2dd6cdb31
https://hal.archives-ouvertes.fr/hal-02506743
https://hal.archives-ouvertes.fr/hal-02506743
Publikováno v:
22nd International Symposium on Design and Diagnostics of Electronic Circuits Systems
DDECS: Design and Diagnostics of Electronic Circuits Systems
DDECS: Design and Diagnostics of Electronic Circuits Systems, Apr 2019, Cluj-Napoca, Romania. ⟨10.1109/DDECS.2019.8724654⟩
DDECS
DDECS: Design and Diagnostics of Electronic Circuits Systems
DDECS: Design and Diagnostics of Electronic Circuits Systems, Apr 2019, Cluj-Napoca, Romania. ⟨10.1109/DDECS.2019.8724654⟩
DDECS
International audience; Standard test infrastructures, such as IEEE Std. 1149.1 (JTAG), IEEE Std. 1500 and IEEE Std. 1687 (IJTAG), are widely used in nowadays Integrated Circuits (ICs). However, they pose an important security challenge to the design
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::f97201d2123728908b640e2aba165c95
https://hal.archives-ouvertes.fr/hal-02149061
https://hal.archives-ouvertes.fr/hal-02149061
Publikováno v:
Microelectronics Journal
Microelectronics Journal, Elsevier, 2019, 86, pp.65-76. ⟨10.1016/j.mejo.2019.02.019⟩
Microelectronics Journal, Elsevier, 2019, 86, pp.65-76. ⟨10.1016/j.mejo.2019.02.019⟩
International audience; Security in the Integrated Circuits (IC) domain is an important challenge, especially with regard to the side channel offered by test infrastructures. Test interfaces provide access to the internal states of the IC by means of
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::ec7b082887125533bb6c897d98db810e
https://hal-lirmm.ccsd.cnrs.fr/lirmm-02306938
https://hal-lirmm.ccsd.cnrs.fr/lirmm-02306938
Autor:
Da Silva, Mathieu
Ce travail de thèse a pour cadre le projet Trusted Environment Execution eVAluation (TEEVA) (projet français FUI n°20 de Janvier 2016 à Décembre 2018) qui vise à évaluer deux solutions alternatives de sécurisation des plateformes mobiles, l
Externí odkaz:
http://www.theses.fr/2018MONTS053/document
Autor:
Da Silva, Mathieu
Publikováno v:
Micro and nanotechnologies/Microelectronics. Université Montpellier, 2018. English. ⟨NNT : 2018MONTS053⟩
This work is part of the Trusted Environment Execution eVAluation (TEEVA) project (French project FUI n°20 from January 2016 to December 2018) that aims to evaluate two alternative solutions for secure mobile platforms: a purely software one, the Wh
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=dedup_wf_001::c659e93ed87ac181175e6f653e03a2ad
https://tel.archives-ouvertes.fr/tel-02122896
https://tel.archives-ouvertes.fr/tel-02122896
Publikováno v:
Colloque du GDR SoC-SiP
Colloque du GDR SoC-SiP, Jun 2018, Paris, France. 12ème Colloque National du GDR SoC-SiP, 2018
Colloque du GDR SoC-SiP, Jun 2018, Paris, France. 12ème Colloque National du GDR SoC-SiP, 2018
National audience; Scan chains offer facilities to steal secret information embedded in a circuit. For instance on a crypto-processor, collecting data related to the round register leads to reveal the secret key used for encryption. To protect agains
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=dedup_wf_001::84ca88fdea791637bf3d869f42c176f8
https://hal-lirmm.ccsd.cnrs.fr/lirmm-01867283/document
https://hal-lirmm.ccsd.cnrs.fr/lirmm-01867283/document
Akademický článek
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Conference
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