Zobrazeno 1 - 9
of 9
pro vyhledávání: '"Saumil G. Merchant"'
Publikováno v:
IEEE Transactions on Parallel and Distributed Systems. 22:33-45
High-performance reconfigurable computers have potential to provide substantial performance improvements over traditional supercomputers. Their acceptance, however, has been hindered by productivity challenges arising from increased design complexity
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f729215a6e4911716eecf7cb742e220a
https://doi.org/10.1109/tpds.2010.67
https://doi.org/10.1109/tpds.2010.67
Publikováno v:
High-Performance Computing Using FPGAs ISBN: 9781461417903
In spite of their potential to provide substantial performance improvements over traditional supercomputers, high-performance reconfigurable computers (HPRCs) and their broad acceptance have been hindered by productivity challenges. These challenges
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3317b32337301eab375f3fc3a19460ac
https://doi.org/10.1007/978-1-4614-1791-0_24
https://doi.org/10.1007/978-1-4614-1791-0_24
Autor:
Giri M. Prabhakar, Saumil G. Merchant
Publikováno v:
HiPC
Increasing sophistication in High Performance Computing (HPC) system architectures, software, and user environments has substantially increased its complexity. For example, tuning an application on a given platform to maximize performance requires pl
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7af185bded93b75b631f4c4fb1a1e32f
https://doi.org/10.1109/hipc.2012.6507528
https://doi.org/10.1109/hipc.2012.6507528
Publikováno v:
IPDPS Workshops
High-Performance Computing (HPC) systems are increasingly moving towards an architecture that is deeply hierarchical. However, the execution model with single-level parallelism embodied in legacy parallel programming models falls short in exploiting
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d148441ecaba83a4300ed067d210793c
https://doi.org/10.1109/ipdps.2011.273
https://doi.org/10.1109/ipdps.2011.273
Publikováno v:
IPDPS Workshops
Partitioned Global Address Space (PGAS) languages offer significant programmability advantages with its global memory view abstraction, one-sided communication constructs and data locality awareness. These attributes place PGAS languages at the foref
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::204c3ad00492ecb4ae21b4c451d7459b
https://doi.org/10.1109/ipdps.2011.279
https://doi.org/10.1109/ipdps.2011.279
Publikováno v:
2011 Aerospace Conference.
Partitioned global address space (PGAS) programming model presents programmers with a globally shared address space with locality awareness and one-sided communication constructs. The shared address space and the one-sided communication constructs en
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::647dc2171f28d541628cd827d22f305b
https://doi.org/10.1109/aero.2011.5747452
https://doi.org/10.1109/aero.2011.5747452
Publikováno v:
VLSI Design, Vol 2010 (2010)
Dedicated hardware implementations of artificial neural networks promise to provide faster, lower-power operation when compared to software implementations executing on microprocessors, but rarely do these implementations have the flexibility to adap
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::9e7d24a16912270bca03ae6767152433
https://doaj.org/article/ea51fcb8366f49b8b782c923d847bd95
https://doaj.org/article/ea51fcb8366f49b8b782c923d847bd95
Autor:
Nahid Alam, Alan D. George, Herman Lam, Greg Stitt, Saumil G. Merchant, Melissa C. Smith, Esam El-Araby, Proshanta Saha, Ivan Gonzalez, Tarek El-Ghazawi
FPGA-based reconfigurable computing (RC) technology has been widely used by the DoD community to exploit performance, power, area, cost, and versatility. Significant challenges, however, remain in application development tools and design methodologie
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9f2a83bebadf6a0bad5d180bd18b8196
https://doi.org/10.21236/ada494473
https://doi.org/10.21236/ada494473
Autor:
Ivan Gonzalez, B.M. Holland, Herman Lam, N. Alam, Tarek El-Ghazawi, Esam El-Araby, Melissa C. Smith, Proshanta Saha, A.D. George, Harald Simmler, C. Reardon, Saumil G. Merchant, Greg Stitt
Publikováno v:
2008 IEEE National Aerospace and Electronics Conference.
Field-programmable gate arrays (FPGAs) have been used to accelerate DoD-related applications with promising performance. However, current development tools require significant hardware knowledge and are not amenable to the increasing complexity of FP
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::494b65848b0c4e994e5094a5032de580
https://doi.org/10.1109/naecon.2008.4806547
https://doi.org/10.1109/naecon.2008.4806547