Zobrazeno 1 - 10
of 29
pro vyhledávání: '"Sau-Mou Wu"'
Autor:
Riichiro Shirota, Su Lu, Ming-Kun Huang, Chun-Hsing Shih, Yan-Xiang Luo, Sau-Mou Wu, Wei Chang, Ji-Ting Liang, A Wang, Chiu-Tsung Huang, Nguyen Dang Chien, Chenhsin Lien, Wen-Fa Wu
Publikováno v:
IEEE Transactions on Electron Devices. 58:1257-1263
The edge encroachment of tunnel oxide is experimentally found to degrade the Fowler-Nordheim (FN) tunneling gate current of NAND-type Flash cells. This work elucidates the impact of edge encroachment on FN tunneling current for use in programming and
Publikováno v:
IWSOC
A high efficient, low power and low phase noise 5.8 GHz LC voltage-controlled oscillator (VCO) for IEEE 802.11a WLAN applications is designed and fabricated in TSMC 0.25 /spl mu/m 1P5M CMOS process. With single 2.5 V supply, it has a tuning range of
Publikováno v:
2003 5th International Conference on ASIC Proceedings (IEEE Cat No 03TH8690) ICASIC-03.
A 5.8-GHz fractional-N frequency synthesizer for IEEE 802.11a WLAN applications is designed in a 0.25mm CMOS process. The synthesizer integrates a low power, high efficient voltage-controlled oscillator (VCO), an injection-locked frequency divider an
Autor:
Kai-Hsiang Chang, Sau-Mou Wu
Publikováno v:
2012 IEEE International Conference on Electron Devices and Solid State Circuit (EDSSC).
Addressed in this paper is an active EMI mitigation scheme for the LED driver based on a switching DC-DC boost converter. The EMI mitigation scheme employs the pseudo-random frequency modulation such that the frequency spectrum of the switching clock
Publikováno v:
2010 IEEE International Conference on Wireless Information Technology and Systems.
An efficient RF-to-DC rectifier for UHF power harvester at 915MHz ISM band is presented. Systematic design and analysis are involved in the study. An optimal 7-stage RF-to-DC rectifier was designed and fabricated in TSMC 0.18um MM/RF CMOS process. Ex
Autor:
Min-Hau Li, Sau-Mou Wu
Publikováno v:
2008 International SoC Design Conference.
In this paper, we propose a new high-resolution, temperature-compensated cyclic CMOS time-to-digital converter. To achieve the requirements for high resolution and wide range, we presented a modified architecture such that the fine measurement is obt
Publikováno v:
2008 International Conference on Signals and Electronic Systems.
Proposed is a new voltage limiting method for the front-end circuit of RFID tags. The technique is based on a resonance-shift mechanism which, when the induced voltage is too strong, will automatically alter the resonant frequency of the front-end to
Publikováno v:
2007 International Symposium on Integrated Circuits.
In this paper, presented is a new adaptive mode-switching mechanism for a synchronous, self-oscillating, fully integrated CMOS dc-dc converter. The proposed adaptive mode-switching mechanism employs a current sensing technique to enable the automatic
Autor:
Sau-Mou Wu, Wei-Liang Chen
Publikováno v:
ISCAS (4)
A frequency synthesizer is designed in a 0.25 /spl mu/m CMOS process for 5-GHz WLAN applications. In consideration of low power consumption, the synthesizer integrates a low power and high efficient voltage-controlled oscillator (VCO) and an injectio
Publikováno v:
PIMRC
A novel batteryless, self-powered transponder design as well as its chip layout is presented. The transponder operates in two phases. First, the chip is energized by rectifying the electromagnetic energy from the interrogating RF field from the RFID