Zobrazeno 1 - 10
of 581
pro vyhledávání: '"Sapatnekar, Sachin S."'
Engineering change orders (ECOs) in late stages make minimal design fixes to recover from timing shifts due to excessive IR drops. This paper integrates IR-drop-aware timing analysis and ECO timing optimization using reinforcement learning (RL). The
Externí odkaz:
http://arxiv.org/abs/2402.07781
Autor:
Lv, Yang, Zink, Brandon R., Bloom, Robert P., Cılasun, Hüsrev, Khanal, Pravin, Resch, Salonik, Chowdhury, Zamshed, Habiboglu, Ali, Wang, Weigang, Sapatnekar, Sachin S., Karpuzcu, Ulya, Wang, Jian-Ping
Conventional computing paradigm struggles to fulfill the rapidly growing demands from emerging applications, especially those for machine intelligence, because much of the power and energy is consumed by constant data transfers between logic and memo
Externí odkaz:
http://arxiv.org/abs/2312.14264
Autor:
Cılasun, Hüsrev, Zeng, Ziqing, S, Ramprasath, Kumar, Abhimanyu, Lo, Hao, Cho, William, Kim, Chris H., Karpuzcu, Ulya R., Sapatnekar, Sachin S.
This work solves 3SAT, a classical NP-complete problem, on a CMOS-based Ising hardware chip with all-to-all connectivity. The paper addresses practical issues in going from algorithms to hardware. It considers several degrees of freedom in mapping th
Externí odkaz:
http://arxiv.org/abs/2309.11017
Autor:
Esmaeilzadeh, Hadi, Ghodrati, Soroush, Kahng, Andrew B., Kinzer, Sean, Manasi, Susmita Dey, Sapatnekar, Sachin S., Wang, Zhiang
Today's performance analysis frameworks for deep learning accelerators suffer from two significant limitations. First, although modern convolutional neural network (CNNs) consist of many types of layers other than convolution, especially during train
Externí odkaz:
http://arxiv.org/abs/2306.16767
Autor:
Sudarshan, Chetan Choppali, Matkar, Nikhil, Vrudhula, Sarma, Sapatnekar, Sachin S., Chhabria, Vidya A.
Decades of progress in energy-efficient and low-power design have successfully reduced the operational carbon footprint in the semiconductor industry. However, this has led to an increase in embodied emissions, encompassing carbon emissions arising f
Externí odkaz:
http://arxiv.org/abs/2306.09434
Due to the unavailability of routing information in design stages prior to detailed routing (DR), the tasks of timing prediction and optimization pose major challenges. Inaccurate timing prediction wastes design effort, hurts circuit performance, and
Externí odkaz:
http://arxiv.org/abs/2305.06917
Autor:
Cılasun, Hüsrev, Resch, Salonik, Chowdhury, Zamshed I., Zabihi, Masoud, Lv, Yang, Zink, Brandon, Wang, Jian-Ping, Sapatnekar, Sachin S., Karpuzcu, Ulya R.
Publikováno v:
2024 ACM/IEEE 51st Annual International Symposium on Computer Architecture (ISCA)
Processing in memory (PiM) represents a promising computing paradigm to enhance performance of numerous data-intensive applications. Variants performing computing directly in emerging nonvolatile memories can deliver very high energy efficiency. PiM
Externí odkaz:
http://arxiv.org/abs/2207.13261
Electromigration (EM) is a key reliability issue in deeply scaled technology nodes. Traditional EM methods first filter immortal wires using the Blech criterion, and then perform EM analysis based on Black's equation on the remaining wires. The Blech
Externí odkaz:
http://arxiv.org/abs/2112.13451
Autor:
Chhabria, Vidya A., Ahuja, Vipul, Prabhu, Ashwath, Patil, Nikhil, Jain, Palkesh, Sapatnekar, Sachin S.
Power delivery network (PDN) analysis and thermal analysis are computationally expensive tasks that are essential for successful IC design. Algorithmically, both these analyses have similar computational structure and complexity as they involve the s
Externí odkaz:
http://arxiv.org/abs/2110.14197
Power delivery network (PDN) design is a nontrivial, time-intensive, and iterative task. Correct PDN design must account for considerations related to power bumps, currents, blockages, and signal congestion distribution patterns. This work proposes a
Externí odkaz:
http://arxiv.org/abs/2110.14184