Zobrazeno 1 - 10
of 24
pro vyhledávání: '"Sanjeev Tannirkulam Chandrasekaran"'
Autor:
Sumukh Prashant Bhanushali, Sanjeev Tannirkulam Chandrasekaran, Stefano Pietri, Arindam Sanyal
Publikováno v:
IEEE Journal of Solid-State Circuits. 57:1100-1111
We present an OTA-free 1-1 multi-stage noise-shaping (MASH) analog-to-digital converter (ADC) utilizing a fully passive noise-shaping successive approximation register (NS-SAR) as the first stage and an open-loop ring voltage-controlled oscillator (V
Publikováno v:
IEEE Transactions on Circuits and Systems II: Express Briefs. 69:349-353
Autor:
Imon Banerjee, Arindam Sanyal, Sumukh Prashant Bhanushali, Sanjeev Tannirkulam Chandrasekaran
Publikováno v:
IEEE Journal on Emerging and Selected Topics in Circuits and Systems. 11:829-839
This work presents a mixed-signal, reservoir-computing neural network (RC-NN) for at-home, real-time health monitoring using intelligent wearable device. The proposed technique is demonstrated on stress detection from electrocardiogram (ECG) signal,
Autor:
Naveen Ramesh, Mohammadhadi Danesh, Gaurav Kapoor, Arindam Sanyal, Sudarsan Sadasivuni, Sanjeev Tannirkulam Chandrasekaran, Aishwarya Bahudhanam Venkatasubramaniyan
Publikováno v:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 28:2280-2289
This work presents a unified weak physical unclonable function (PUF) and a true random number generator (TRNG) based on the current-steering digital-to-analog converter (DAC) and ring voltage-controlled oscillator (VCO). Entropy source for the weak P
Publikováno v:
IEEE Transactions on Circuits and Systems I: Regular Papers. 67:3262-3272
In this work we propose a single channel band-pass (BP) SAR ADC with dynamic noise transfer function (NTF) re-configuration. The proposed ADC employs a low-power two-stage architecture. After the SAR finishes quantization, the residue is extracted by
Publikováno v:
IEEE Transactions on Circuits and Systems I: Regular Papers. 67:1149-1157
A continuous-time (CT) second-order $\Delta \Sigma $ current-to-digital converter (CDC) is presented in this paper. The proposed CDC uses two current-controlled ring oscillators as phase-domain integrators to achieve second-order quantization noise s
Publikováno v:
ESSCIRC
This work presents the first on-chip, mixed-signal echo state network (ESN) for early prediction of heart disease. The ESN comprises an input layer, a non-linear projection (NP) layer, and an output layer. Only the output layer of the ESN requires tr
Publikováno v:
Electronics Letters. 56:1335-1337
In this Letter, the authors report a flexible CMOS chip converted by a novel chip transformation process. To realise a truly flexible CMOS chip, a two-step etching process was employed in the transformation process: (i) vapour etching to remove inter
Autor:
Arindam Sanyal, Sanjeev Tannirkulam Chandrasekaran, Imon Banerjee, Sumukh Prashant Bhanushali
Publikováno v:
IEEE Solid-State Circuits Letters. 3:290-293
This letter presents the first on-chip bio-inspired reservoir computer (RC) prototype implemented in a 65-nm CMOS. The RC comprises 50 time-multiplexed neurons, and each neuron embeds a strong nonlinearity in a feedback loop. The RC applies a nonline
Publikováno v:
IEEE Solid-State Circuits Letters. 3:342-345
A continuous-time band-pass (BP) delta–sigma (DS) analog-to-digital converter (ADC) is presented in this letter. The proposed BP ADC has four time-interleaved (TI) sub-ADCs that use ring oscillators as phase-domain integrators to achieve second-ord