Zobrazeno 1 - 10
of 10
pro vyhledávání: '"Sanjaykumar L. Patil"'
Autor:
Praveen V. Pol, Sanjaykumar L. Patil
Publikováno v:
Electric Power Components and Systems. 51:525-537
Autor:
Sangmesh V. Malge, Mukesh G. Ghogare, Sanjaykumar L. Patil, Amruta S. Deshpande, Sanjeev K. Pandey
Publikováno v:
IEEE Transactions on Circuits and Systems II: Express Briefs. 70:186-190
Publikováno v:
ISA Transactions. 126:486-497
This research article presents a process control application of a single-input single-output (SISO) level control system using the combination of fast terminal sliding mode control (FTSMC) and optimization method. Non-dominated sorted genetic algorit
Autor:
Prashant K. Aher, Sanjaykumar L. Patil, Ameya Gambhir, Abhishek Mandhana, Amruta Deshpande, Sanjeev Kumar Pandey
Publikováno v:
2023 International Conference on Power Electronics and Energy (ICPEE).
Publikováno v:
IECON 2022 – 48th Annual Conference of the IEEE Industrial Electronics Society.
Publikováno v:
2022 International Conference on Industry 4.0 Technology (I4Tech).
Autor:
Ajay A. Rathod, Sangmesh V. Malge, Sudarshan G. Kanse, Sanjay S. Dambhare, Sanjaykumar L. Patil
Publikováno v:
2022 2nd Asian Conference on Innovation in Technology (ASIANCON).
Publikováno v:
2022 2nd Asian Conference on Innovation in Technology (ASIANCON).
Publikováno v:
2022 2nd International Conference on Intelligent Technologies (CONIT).
Publikováno v:
Electronics, Vol 11, Iss 207, p 207 (2022)
Electronics; Volume 11; Issue 2; Pages: 207
Electronics; Volume 11; Issue 2; Pages: 207
The positive output elementary Luo (POEL) converter is a fourth‐order DC–DC converter having highly non‐linear dynamic characteristics. In this paper, a new dynamic output voltage feedback controller is proposed to achieve output voltage regula
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::f116d7713fe69b6878bb0918e47c2dae
https://hdl.handle.net/10356/165127
https://hdl.handle.net/10356/165127