Zobrazeno 1 - 4
of 4
pro vyhledávání: '"Sanjay Vishin"'
Autor:
Anuj Pathania, Thannirmalai Somu Muthukaruppan, Vanchinathan Venkataramani, Mihai Pricopi, Sanjay Vishin, Tulika Mitra
Publikováno v:
The Dark Side of Silicon ISBN: 9783319315942
The dark silicon era is driving the emergence of asymmetric computing platforms consisting of cores with diverse power-performance characteristics enabling better match between a task’s requirements and the compute engine leading to substantially i
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f65a80791879b791803d4578b7b5619f
https://doi.org/10.1007/978-3-319-31596-6_6
https://doi.org/10.1007/978-3-319-31596-6_6
Autor:
Mihai Pricopi, Thannirmalai Somu Muthukaruppan, Vanchinathan Venkataramani, Tulika Mitra, Sanjay Vishin
Publikováno v:
2013 International Conference on Compilers, Architecture and Synthesis for Embedded Systems (CASES).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9cbdcbc2e9af420a5a85c1f96cb76f53
https://doi.org/10.1109/cases.2013.6662519
https://doi.org/10.1109/cases.2013.6662519
Autor:
Sanjay Vishin, Thannirmalai Somu Muthukaruppan, Vanchinathan Venkataramani, Mihai Pricopi, Tulika Mitra
Publikováno v:
DAC
Asymmetric multi-core architectures integrating cores with diverse power-performance characteristics is emerging as a promising alternative in the dark silicon era where only a fraction of the cores on chip can be powered on due to thermal limits. We
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2a296f751b5810631c700681bccac4ea
https://doi.org/10.1145/2463209.2488949
https://doi.org/10.1145/2463209.2488949
Autor:
Andreas Nowatzyk, Michael C. Browne, Michael W. Parkin, Edmund J. Kelly, Gunes Aybay, Bill Radke, Sanjay Vishin
Publikováno v:
Lecture Notes in Computer Science ISBN: 9783540602477
Euro-Par
Euro-Par
Shared memory multiprocessors are based on memory models, which are precise contracts between hard- and software that spell out the semantics of memory operations. Scalable systems implementing such memory models rely on cache coherency protocols tha
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d41c4dc2b6b49809342fc4b41784825a
https://doi.org/10.1007/bfb0020471
https://doi.org/10.1007/bfb0020471