Zobrazeno 1 - 10
of 158
pro vyhledávání: '"Sangyeun Cho"'
Publikováno v:
PLoS ONE, Vol 12, Iss 3, p e0174375 (2017)
Solid-state drives (SSDs) have recently become a common storage component in computer systems, and they are fueled by continued bit cost reductions achieved with smaller feature sizes and multiple-level cell technologies. However, as the flash memory
Externí odkaz:
https://doaj.org/article/0d37dc0012374f3a8c746dd8ee7b5ba9
Autor:
Gyeongyeol Choi, Joo-young Hwang, Jaemin Jung, Youjip Won, Sangyeun Cho, Joontaek Oh, Seongbae Son
Publikováno v:
ACM Transactions on Storage. 14:1-29
This work is dedicated to eliminating the overhead required for guaranteeing the storage order in the modern IO stack. The existing block device adopts a prohibitively expensive approach in ensuring the storage order among write requests: interleavin
Publikováno v:
Journal of Parallel and Distributed Computing. 100:172-180
Compute platforms are increasingly adopting heterogeneous multicore processing. This paper derives an analytical model to study the benefits and preferred configurations of the single instruction set architecture (ISA) heterogeneous multicore system.
Autor:
Duck-Ho Bae, Insoon Jo, Jaeheon Jeong, Andre S. Yoon, Jeong-Uk Kang, Sangyeun Cho, Daniel D. G. Lee
Publikováno v:
Proceedings of the VLDB Endowment. 9:924-935
This paper presents YourSQL , a database system that accelerates data-intensive queries with the help of additional in-storage computing capabilities. YourSQL realizes very early filtering of data by offloading data scanning of a query to user-progra
Publikováno v:
IEEE Transactions on Computers. 65:2270-2283
Phase-change memory (PCM) has emerged as a candidate that overcomes the physical limitations faced by DRAM and NAND flash memory. While PCM has desirable properties in terms of scalability and density, it suffers from limited endurance. Repeated writ
Autor:
Duck-Ho Bae, Sangyeun Cho, Insoon Jo, Joo-young Hwang, Jaeheon Jeong, Youra Adel Choi, Dong-Gi Lee
Publikováno v:
ISCA
Performance critical transaction and storage systems require fast persistence of write data. Typically, a non-volatile RAM (NVRAM) is employed on the datapath to the permanent storage, to temporarily and quickly store write data before the system ack
Autor:
Chanho Yoon, Shine Kim, Kitae Park, Jaechun Park, Yu Geunyeong, Jin-hyeok Choi, Jaeheon Jeong, Sangyeun Cho, Daniel D. G. Lee, Dongku Kang, Seonghoon Woo, Han Kyuwook, Ki-whan Song, Youra Adel Choi, Chulseung Lee, Jae Hong Kim, Woo-Seong Cheong, Dae Hyun Kim, Hwaseok Oh
Publikováno v:
ISSCC
In a memory hierarchy, there are various classes of memory systems depending on the access latency. A typical memory hierarchy consists of a CPU cache, DRAM, and an SSD or HDD. The DRAM has an access latency of 100ns, while flash memory has a latency
Autor:
Jun Heo, Hakbeom Jang, Jae W. Lee, Joo-young Hwang, Jaeyoung Jang, Sangyeun Cho, Wenjing Jin, Jonghyun Bae
Publikováno v:
IEEE BigData
Recently, in-memory big data processing frameworks have emerged, such as Apache Spark and Ignite, to accelerate workloads requiring frequent data reuse. With effective in-memory caching these frameworks eliminate most of I/O operations, which would o
Publikováno v:
IEEE Transactions on Computers. 64:847-861
With their potential for high scalability and density, resistive memories are foreseen as a promising technology that overcomes the physical limitations confronted by charge-based DRAM and flash memory. Yet, a main burden towards the successful adopt
Publikováno v:
IEEE Transactions on Computers. 63:3114-3126
DRAM stores information in electric charge. Because DRAM cells lose stored charge over time due to leakage, they have to be “refreshed” in a periodic manner to retain the stored information. This refresh activity is a source of increased energy c