Zobrazeno 1 - 10
of 12
pro vyhledávání: '"Sangdon Jung"'
Publikováno v:
2022 IEEE Asian Solid-State Circuits Conference (A-SSCC).
Autor:
Inyup Kang, Jongmi Lee, Seungjin Kim, Jongwoo Lee, Kim Wan, Juyoung Han, Jaeyeol Han, Jong-Soo Lee, Takahiro Nomiyama, Lo Chilun, Sangdon Jung, Thomas Byunghak Cho, Byoungjoong Kang
Publikováno v:
IEEE Journal of Solid-State Circuits. 55:3400-3413
This article presents a fully integrated stand-alone narrowband Internet-of-Things (NB-IoT) and global navigation satellite system (GNSS) system-on-chip (SoC). It aims for an all-in-one system to integrate all necessary blocks such as an RF transceiv
Autor:
Seungjin Kim, Jongwoo Lee, Jae-Hong Jung, Byungki Han, Kyungmin Lee, Junhee Jung, Seunghyun Oh, Sangdon Jung
Publikováno v:
VLSI Circuits
This paper proposes a fractional-N sub-sampling ring PLL employing a jitter-tracking DLL-assisted DTC. The DTC achieves 0.49ps resolution and 0.98LSB rms INL with a dynamic range reduction through multi-phases of the DLL. In addition, an adaptive pul
Autor:
Sangdon Jung, Thomas Byunghak Cho, Byoungjoong Kang, Jongwoo Lee, Seungjin Kim, Kim Wan, Takahiro Nomiyama, Inyup Kang, Juyoung Han, Jaeyeol Han, Jong-Soo Lee, Jongmi Lee, Lo Chilun
Publikováno v:
ISSCC
Due to extensive application prospects and huge market potential of narrowband internet-of-things (NB-IoT), there is growing demand for low-power and low-cost system-on-chips (SoCs) and a massive number of wireless devices. For a low-cost solution, t
Autor:
Byungki Han, Jae-Hong Jung, Sangdon Jung, Sung Barosaim, Seungyong Bae, Seunghyun Oh, Seungjin Kim, Myeongcheol Shin, Soonwoo Choi, Yong Lim, Youngsea Cho, Jongwoo Lee, Jae-Hoon Lee, Lo Chilun, Dooseok Choi
Publikováno v:
A-SSCC
This paper presents a low power and area efficient wireless direct sampling receiver (DSR) implemented in 14nm FinFET process for frequency modulation (FM) receiver. By employing digital mixer for channel selection, the inductor based local oscillato
Publikováno v:
A-SSCC
This paper proposes a ring-VCO-based fractional-N PLL with a noise-power reconfigurable ring-VCO and a self-chopped reference frequency doubler for multi-standard applications. To cover the various specifications of SoC chips, the jitter and power of
Publikováno v:
Analog Integrated Circuits and Signal Processing. 64:153-157
A frequency-to-digital converter based small size smart temperature sensor for portable applications is proposed. To reduce its size and power consumption, the proposed temperature sensor adopted frequency-to-digital converter without relying on a ba
Publikováno v:
CICC
The proposed temperature sensor is based on CMOS ring oscillators and a frequency-to-digital converter capable of simple and efficient temperature conversion to digital value. The proposed temperature sensor consumes 400uW at a conversion rate of 366
Publikováno v:
ESSCIRC
A wide-range, input-duty-independent, all-digital, multiphase clock generator is proposed. By using a supply noise filtering block power supply noise effect is reduced. Furthermore, because the proposed clock generator consists of all-digital logic g
Publikováno v:
2009 IEEE Custom Integrated Circuits Conference; 2009, p203-206, 4p