Zobrazeno 1 - 10
of 55
pro vyhledávání: '"Sang-Koo Chung"'
Autor:
Sang-Koo Chung, Jin-Woo Moon
Publikováno v:
Journal of Electrical Engineering and Technology. 6:824-828
Transmission line analysis of the surface accumulation layer in injection-enhanced gate transistor (IEGT) is presented for the first time, based on per-unit-length resistance and conductance of the surface layer beneath the gate of IEGT. Lateral elec
Autor:
Jin-Woo Moon, Sang-Koo Chung
Publikováno v:
Journal of Electrical Engineering and Technology. 4:401-404
A simple analytical expression for a current gain of IGBT is derived in terms of the device parameters as well as a gate length dependent parameter, which allows for the determination of the current components of the device as a function of its gate
Publikováno v:
Solid-State Electronics. 49:834-837
An analytical model for the carrier density at the accumulation layer of TIGBT (Trench Insulated Gate Transistor) is presented in terms of the aspect ratio with the influence of the depth of the trench gate below the P base taken into account. Based
Publikováno v:
Microelectronics Journal. 34:683-686
The breakdown voltage and on-resistance of a multi-RESURF LDMOS are studied numerically and analytically. The results are compared with those from the conventional LDMOS. Reduction of on-resistance by 23% is obtained for the multi-layer structure wit
Autor:
Sang-Koo Chung, Chung-Hee Kim
Publikováno v:
IEEE Transactions on Electron Devices. 50:513-516
The effects of Gaussian impurity profiles in the p/sup +/ anode/n-buffer layer of PT-IGBTs on device characteristics are studied numerically and analytically. The results are compared with those from the uniform impurity profiles. A better tradeoff b
Publikováno v:
International Journal of Numerical Modelling: Electronic Networks, Devices and Fields. 16:345-352
A junction termination with a field plate combined with a semi-resistive layer deposited on front oxide layer is proposed for the first time as a termination structure of a 2.5 kV IGBT which allows high forward blocking voltage. The voltage handling
Autor:
Seung-Youp Han, Sang-Koo Chung
Publikováno v:
Microelectronics Journal. 33:399-402
Useful design curves of breakdown voltage are provided, which allow determination of breakdown voltage at the field plate edge in terms of field plate length, oxide thickness, and substrate doping concentration. The effect of the interface charge on
Publikováno v:
Microelectronics Journal. 32:497-502
We proposed a new lateral double-diffused MOS (LDMOS) structure employing a double p/n epitaxial layer, which is formed on p− substrates. Trenched gate and drain are also employed to obtain uniform and high drift current density. The breakdown volt
Publikováno v:
Microelectronics Journal. 31:963-967
A new SOI LDMOS using a recessed source and a trench drain was proposed to improve the on-characteristics at a given breakdown voltage. On-resistance and breakdown voltages of the proposed LDMOS are investigated by the two-dimensional simulator, MEDI
Publikováno v:
Microelectronics Journal. 31:685-688
An approximate but analytical expression for the surface field distribution of RESURF LDMOSFETs is presented in terms of the device parameters and the applied drain voltage, which allows calculation of the breakdown voltage via the surface field as a