Výsledky vyhledávání

A High-level Methodology for Automatically Generating Dynamic Partially Reconfigurable Systems using IP-XACT and the UML MARTE Profile

Autor: Sana Cherif, El-Bay Bourennane, Gilberto Ochoa-Ruiz, Philippe Soulard, Ouassila Labbani

Publikováno v: Design Automation for Embedded Systems
Design Automation for Embedded Systems, Springer Verlag, 2012
Design Automation for Embedded Systems, Springer Verlag, 2012, 16, pp.93-128. ⟨10.1007/s10617-012-9098-6⟩
Design Automation for Embedded Systems, 2012, 16, pp.93-128. ⟨10.1007/s10617-012-9098-6⟩

International audience; Dynamic Partial Reconﬁguration (DPR) has been introduced in recent years as a method to increase the ﬂexibility of FPGA designs. However, using DPR for building com- plex systems remains a daunting task. Recently, approach

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::e25a112bdbc4415096a7d6d833908658
https://hal.inria.fr/hal-00745377/file/daem-final.pdf

Zobrazit plný text záznamu

Enabling partially reconfigurable IP cores parameterisation and integration using MARTE and IP-XACT

Autor: Sana Cherif, Samy Meftali, El-Bay Bourennane, Ouassila Labbani, Gilberto Ochoa-Ruiz, Jean-Luc Dekeyser

Publikováno v: Rapid System Prototyping (RSP), 2012 23rd IEEE International Symposium on
2012 23rd IEEE International Symposium on Rapid System Prototyping (RSP)
2012 23rd IEEE International Symposium on Rapid System Prototyping (RSP), Oct 2012, Finland. pp.107-113
2012 23rd IEEE International Symposium on Rapid System Prototyping (RSP), Oct 2012, Finland. pp.107-113, 2012
RSP

International audience; This paper presents a framework which facilitates the parameterization and integration of IP cores into partially reconfigurable SoC platforms, departing from a high-level of abstraction. The approach is based in a Model-Drive

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::547954adea97d945bd65c1ffd69a949e
https://hal.archives-ouvertes.fr/hal-00788463/document

Zobrazit plný text záznamu

Facilitating IP deployment in a MARTE-based MDE methodology using IP-XACT: a XILINX EDK case study

Autor: Sana Cherif, O. Labbani-Narsis, Samy Meftali, El-Bay Bourennane, Gilberto Ochoa-Ruiz, Jean-Luc Dekeyser

Publikováno v: International Conference on Reconfigurable Computing and FPGAs (Reconfig 2012)
International Conference on Reconfigurable Computing and FPGAs (Reconfig 2012), Dec 2012, Cancun, Mexico
International Conference on Reconfigurable Computing and FPGAs (Reconfig 2012), Dec 2012, Cancun, Mexico. 2012
ReConFig

International audience; In this paper we present framework for the deployment of hardware IPs at high-levels of abstraction. It is based in a model- driven approach that aims at the automatic generation of Dynamic Partial Reconfiguration designs crea

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::54a372ca7535e5d81560a563a1ae966f
https://inria.hal.science/hal-00745324

Zobrazit plný text záznamu

High Level Design of adaptive distributed controller for Partial Dynamic reconfiguration in FPGA

Autor: Sana Cherif, Samy Meftali, Chiraz Trabelsi, Jean-Luc Dekeyser

Publikováno v: Proceeding of Design and Architectures for Signal and Image Processing, DASIP 2011
Proceeding of Design and Architectures for Signal and Image Processing, DASIP 2011, Nov 2011, Tampere, Finland
DASIP

International audience; Controlling dynamic and partial reconfigurations becomes one of the most important key issues in modern embedded systems design. In fact, in such systems, the reconfiguration controller can significantly affect the system perf

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::5e4dabd1e5529160b742169cd764649a
https://inria.hal.science/inria-00609122

Zobrazit plný text záznamu

Modeling reconfigurable Systems-on-Chips with UML MARTE profile: an exploratory analysis

Autor: Imran Rafiq Quadri, Sana Cherif, Samy Meftali, Jean-Luc Dekeyser

Publikováno v: 13th Euromicro Conference on Digital System Design (DSD 2010)
13th Euromicro Conference on Digital System Design (DSD 2010), Sep 2010, Lille, France
DSD

International audience; Reconfigurable FPGA based Systems-on-Chip (SoC) architectures are increasingly becoming the preferred solution for implementing modern embedded systems, due to their flexible nature. However due to the tremendous amount of har

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::c3cc72e70e2dd547a07abbb025de5ecc
https://inria.hal.science/inria-00525004/document

Zobrazit plný text záznamu

Vyhledávací nástroje:

Upřesnit hledání