Zobrazeno 1 - 10
of 32
pro vyhledávání: '"Samuel D. Naffziger"'
Publikováno v:
VLSI Circuits
The worldwide computing market grew tremendously over the past decades, and looking toward the future, these trends do not appear to be slowing down. Moore’s Law coupled with incredible innovation in hardware and software are engines driving this g
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::68d71460ab221041422e3d03f687517a
https://doi.org/10.23919/vlsicircuits52068.2021.9492400
https://doi.org/10.23919/vlsicircuits52068.2021.9492400
Autor:
Sean White, Samuel D. Naffziger, Gabriel H. Loh, Mahesh Subramony, Noah Beck, Thomas Burd, Kevin M. Lepak
Publikováno v:
ISCA
For decades, Moore's Law has delivered the ability to integrate an exponentially increasing number of devices in the same silicon area at a roughly constant cost. This has enabled tremendous levels of integration, where the capabilities of computer s
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::04395fd74e952abb99e499bfa7f9061c
https://doi.org/10.1109/isca52012.2021.00014
https://doi.org/10.1109/isca52012.2021.00014
Autor:
Sean White, Milam Paraschou, Larry D. Hewitt, Nathan Kalyanasundharam, Gregg Donley, Samuel D. Naffziger, Smith Alan Dodson, Thomas Burd, Noah Beck
Publikováno v:
IEEE Journal of Solid-State Circuits. 54:133-143
AMD’s “Zeppelin” system-on-a-chip (SoC) combines eight high-performance “Zen” cores with a shared 16-MB L3 Cache, along with six high-speed I/O links and two DDR4 channels, using the infinity fabric (IF) to provide a high speed, low latency
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::610bf9949436f38dcf5b69cf2e955c36
https://doi.org/10.1109/jssc.2018.2873584
https://doi.org/10.1109/jssc.2018.2873584
Autor:
Jonathan Chang, Debbie Marr, Ken Takeuchi, Samuel D. Naffziger, Shinichiro Shiratake, Thomas Burd, Henk Corporaal, Naresh R. Shanbhag, Eric Karl, Hugh Mair
Publikováno v:
ISSCC
General-purpose computing has derived performance gains from clock frequency and instructions-per-clock for over four decades; achieving an impressive ∼105 performance increase over the same timeframe. With the future of the traditional computing r
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9944df1b606de6c23c308ae741fed9c7
https://doi.org/10.1109/isscc42613.2021.9366007
https://doi.org/10.1109/isscc42613.2021.9366007
Publikováno v:
DATE
Chiplet-based architectures have recently started attracting a lot of attention, and we are seeing real-world architectures utilizing chiplet technologies in high-volume commercial production in multiple mainstream markets. In this special session pa
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::19707c438a62781c454ab8b28588af32
https://doi.org/10.23919/date51398.2021.9474021
https://doi.org/10.23919/date51398.2021.9474021
Publikováno v:
ISSCC
AMO's “Rome” and “Matisse” are second-generation AMD Infinity Fabric-based SoCs using 3 unique hybrid process technology chiplets to achieve leading performance, performance/$ and performance/W, targeting server and client markets, respective
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::bb476fa85ccc55a27209481b9445e535
https://doi.org/10.1109/isscc19947.2020.9063103
https://doi.org/10.1109/isscc19947.2020.9063103
Autor:
Sal Dasgupta, Pradeep Jayaraman, Deepesh John, Samuel D. Naffziger, Chetan Bisht, Ashish Jain, Teja Singh
Publikováno v:
ISSCC
Implemented in TSMC's 7nm FinFET technology, the design of the Radeon RX 5700 series GPUs incorporate a 256b memory interface of GDDR6 memory operating at 14Gb/s for a total of 448GB/s bandwidth, a x16 PCIe® Gen4 link interface, and six 1.4 Display
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::76c80f1219881948030d8aa3bd667c0a
https://doi.org/10.1109/isscc19947.2020.9062947
https://doi.org/10.1109/isscc19947.2020.9062947
Autor:
Deepesh John, Amy Novak, Miguel Rodriguez, Alex Schaefer, Russell Schreiber, Stephen V. Kosonocky, Teja Singh, Sundar Rangarajan, Samuel D. Naffziger, Carson Henrion
Publikováno v:
IEEE Journal of Solid-State Circuits. 53:102-114
AMD’s next-generation, high-performance, energy-efficient $\times 86$ core, Zen, targets server, desktop, and mobile client applications with a 52% instructions per clock cycle (IPC) uplift over the previous generation. The increase in IPC compleme
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::125623032a8a3eeb77545f7a637b0c74
https://doi.org/10.1109/jssc.2017.2752839
https://doi.org/10.1109/jssc.2017.2752839
Publikováno v:
IEEE Micro. 36:22-33
Carrizo is AMD's sixth-generation accelerated processing unit (APU), optimized to deliver performance uplifts and battery-life improvements in thinner and lighter notebook platforms. Its primary goals are to deliver a differentiated gaming and multim
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::23f4c88aeed4dd05bf784d693eda0158
https://doi.org/10.1109/mm.2016.24
https://doi.org/10.1109/mm.2016.24
Autor:
Russell Schreiber, Guhan Krishnan, Dave Johnson, Hugh McIntyre, Jim Farrell, David Akeson, Samuel D. Naffziger, Srikanth Arekapudi, Jonathan White, Benjamin Munger, Tom Burd, Kathryn Wilcox, Edward J. McLellan, Harry R. Fair, Sriram Sundaram
Publikováno v:
IEEE Journal of Solid-State Circuits. 51:105-116
AMD's 6th generation “Carrizo” APU, targeted at 12–35 W mobile computing form factors, contains 3.1 billion transistors, occupies 250.04 mm $^{2}$ and is implemented in a 28 nm HKMG planar dual-oxide FET technology with 12 metal layers. The des
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0a089cf76bdaf00a057a814330c1542d
https://doi.org/10.1109/jssc.2015.2464688
https://doi.org/10.1109/jssc.2015.2464688