Zobrazeno 1 - 10
of 67
pro vyhledávání: '"Sampson, Adrian"'
Hardware generators help designers explore families of concrete designs and their efficiency trade-offs. Both parameterized hardware description languages (HDLs) and higher-level programming models, however, can obstruct composability. Different conc
Externí odkaz:
http://arxiv.org/abs/2401.02570
Compilers for accelerator design languages (ADLs) translate high-level languages into application-specific hardware. ADL compilers rely on a hardware control interface to compose hardware units. There are two choices: static control, which relies on
Externí odkaz:
http://arxiv.org/abs/2312.16300
Autor:
Upasani, Gaurang, Sinclair, Matthew D., Sampson, Adrian, Ranganathan, Parthasarathy, Patterson, David, Shah, Shaan, Parthasarathy, Nidhi, Jain, Rutwik
Computer Architecture, broadly, involves optimizing hardware and software for current and future processing systems. Although there are several other top venues to publish Computer Architecture research, including ASPLOS, HPCA, and MICRO, ISCA (the I
Externí odkaz:
http://arxiv.org/abs/2306.03964
Modular design is a key challenge for enabling large-scale reuse of hardware modules. Unlike software, however, hardware designs correspond to physical circuits and inherit constraints from them. Timing constraints -- which cycle a signal arrives, wh
Externí odkaz:
http://arxiv.org/abs/2304.10646
Depthwise separable convolutions and frequency-domain convolutions are two recent ideas for building efficient convolutional neural networks. They are seemingly incompatible: the vast majority of operations in depthwise separable CNNs are in pointwis
Externí odkaz:
http://arxiv.org/abs/2109.07707
Publikováno v:
ASPLOS 2021: Proceedings of the 26th ACM International Conference on Architectural Support for Programming Languages and Operating Systems
We present Calyx, a new intermediate language (IL) for compiling high-level programs into hardware designs. Calyx combines a hardware-like structural language with a software-like control flow representation with loops and conditionals. This split re
Externí odkaz:
http://arxiv.org/abs/2102.09713
Autor:
Nigam, Rachit, Atapattu, Sachille, Thomas, Samuel, Li, Zhijing, Bauer, Theodore, Ye, Yuwei, Koti, Apurva, Sampson, Adrian, Zhang, Zhiru
Publikováno v:
PLDI 2020: Proceedings of the 41st ACM SIGPLAN Conference on Programming Language Design and Implementation
Field-programmable gate arrays (FPGAs) provide an opportunity to co-design applications with hardware accelerators, yet they remain difficult to program. High-level synthesis (HLS) tools promise to raise the level of abstraction by compiling C or C++
Externí odkaz:
http://arxiv.org/abs/2004.04852
Deep learning for computer vision depends on lossy image compression: it reduces the storage required for training and test data and lowers transfer costs in deployment. Mainstream datasets and imaging pipelines all rely on standard JPEG compression.
Externí odkaz:
http://arxiv.org/abs/2003.02874
Autor:
Stanley-Marbell, Phillip, Alaghi, Armin, Carbin, Michael, Darulova, Eva, Dolecek, Lara, Gerstlauer, Andreas, Gillani, Ghayoor, Jevdjic, Djordje, Moreau, Thierry, Cacciotti, Mattia, Daglis, Alexandros, Jerger, Natalie Enright, Falsafi, Babak, Misailovic, Sasa, Sampson, Adrian, Zufferey, Damien
When a computational task tolerates a relaxation of its specification or when an algorithm tolerates the effects of noise in its execution, hardware, programming languages, and system software can trade deviations from correct behavior for lower reso
Externí odkaz:
http://arxiv.org/abs/1809.05859
Hardware support for deep convolutional neural networks (CNNs) is critical to advanced computer vision in mobile and embedded devices. Current designs, however, accelerate generic CNNs; they do not exploit the unique characteristics of real-time visi
Externí odkaz:
http://arxiv.org/abs/1803.06312