Zobrazeno 1 - 10
of 11
pro vyhledávání: '"Samantika Subramaniam"'
Autor:
Joel Emer, Samantika Subramaniam, Tryggve Fossum, Aamer Jaleel, William C. Hasenplaugh, Simon C. Steely, Carl J. Beckmann
Publikováno v:
ACM Transactions on Architecture and Code Optimization. 10:1-24
As microprocessor designs integrate more cores, scalability of cache coherence protocols becomes a challenging problem. Most directory-based protocols avoid races by using blocking tag directories that can impact the performance of parallel applicati
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2e8719aba33e5592aeca31ea567d68b8
https://doi.org/10.1145/2541228.2541235
https://doi.org/10.1145/2541228.2541235
Publikováno v:
SBAC-PAD
The term "SQL-on-Hadoop" has recently gained significant traction [19]. Impala represents a new emerging class of SQL-on-Hadoop systems that exploit a shared-nothing parallel database architecture over Hadoop. Impala was designed to close the gap of
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2c9242fab76d93b31145a08cd1cf0dba
https://doi.org/10.1109/sbac-pad.2016.31
https://doi.org/10.1109/sbac-pad.2016.31
Publikováno v:
ASPLOS
When several applications are co-scheduled to run on a system with multiple shared LLCs, there is opportunity to improve system performance. This opportunity can be exploited by the hardware, software, or a combination of both hardware and software.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::43db7486edf55ca8de68207e8b07d82e
https://doi.org/10.1145/2189750.2151003
https://doi.org/10.1145/2189750.2151003
Autor:
Samantika Subramaniam, Gabriel H. Loh
Publikováno v:
ACM Transactions on Architecture and Code Optimization. 6:1-33
Allowing loads that do not violate memory ordering to issue out of order with respect to earlier unresolved store addresses is very important for extracting parallelism in large-window superscalar processors. Previous research has proposed memory dep
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::13cc2278cb88e34ed155a69c84000514
https://doi.org/10.1145/1596510.1596514
https://doi.org/10.1145/1596510.1596514
Publikováno v:
ISPASS
For academic computer architecture research, a large number of publicly available simulators make use of relatively simple abstractions for the microarchitecture of the processor pipeline. For some types of studies, such as those for multi-core cache
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c58de96f4ba1f19d0f3fba0eb22fcbef
https://doi.org/10.1109/ispass.2009.4919638
https://doi.org/10.1109/ispass.2009.4919638
Publikováno v:
HPCA
Some instructions have more impact on processor performance than others. Identification of these critical instructions can be used to modify and improve instruction processing. Previous work has shown that the criticality of instructions can be dynam
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7f54e1631685bd7bd421bbc142d71007
https://doi.org/10.1109/hpca.2009.4798280
https://doi.org/10.1109/hpca.2009.4798280
Publikováno v:
HPCA
Simultaneous multithreading (SMT) attempts to keep a dynamically scheduled processorpsilas resources busy with work from multiple independent threads. Threads with long-latency stalls, however, can lead to a reduction in overall throughput because th
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8a0ac0b37ab27961b79ea28cb4f18b38
https://doi.org/10.1109/hpca.2008.4658634
https://doi.org/10.1109/hpca.2008.4658634
Publikováno v:
2016 28th International Symposium on Computer Architecture & High Performance Computing (SBAC-PAD); 2016, p182-189, 8p
Autor:
Gabriel H. Loh, Samantika Subramaniam
Publikováno v:
MICRO
Modern processors use CAM-based load and store queues (LQ/SQ) to support out-of-order memory scheduling and store-to-load forwarding. However, the LQ and SQ scale poorly for the sizes required for large-window, high- ILP processors. Past research has
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::49f072b9dc2c4ea71207fb479d136c79
https://doi.org/10.1109/micro.2006.26
https://doi.org/10.1109/micro.2006.26
Autor:
Samantika Subramaniam, Gabriel H. Loh
Publikováno v:
2006 39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO'06); 2006, p273-284, 12p