Zobrazeno 1 - 2
of 2
pro vyhledávání: '"Sadayoshi Umeda"'
Autor:
Sadayoshi Umeda, Haruo Kobayashi, Kiichi Niitsu, Takahiro Yamaguchi, Isao Shimizu, Tatsuji Matsuura, Naohiro Harigai, Masanobu Tsuji, Daiki Hirabayashi, Noriaki Dobashi, Osamu Kobayashi, Yusuke Osawa, Masafumi Watanabe, Ryoji Shiota, Nobukazu Takai
Publikováno v:
Key Engineering Materials. 643:149-155
This paper describes a phase noise measurement and testing technique for a clock using a delta-sigma time-to-digital converter (TDC) and verifies its effectiveness with MATLAB simulations. The proposed technique can be implemented with relatively sma
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::024554c9188ce972341ad4f39903de82
https://doi.org/10.4028/www.scientific.net/kem.643.149
https://doi.org/10.4028/www.scientific.net/kem.643.149
Autor:
Takeshi Chujo, Koshi Sato, Noriaki Dobashi, Masanobu Tsuji, Hideyuki Nakamura, Masafumi Watanabe, Haruo Kobayashi, Takuya Arafune, Daiki Hirabayashi, Ryoji Shiota, Sadayoshi Umeda, Shu Sasaki, Shohei Shibuya
Publikováno v:
2015 IEEE 20th International Mixed-Signals Testing Workshop (IMSTW).
This paper describes design and implementation of a multi-bit delta-sigma (ΔΣ) Time-to-Digital Converter (TDC) with Data-Weighted-Averaging (DWA) algorithm on analog FPGA. I/O interfacing circuits such as double-data-rate (DDR) memory interfaces ar
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7d08a2b7dc0ff90a9dd4030021d8b0f0
https://doi.org/10.1109/ims3tw.2015.7177881
https://doi.org/10.1109/ims3tw.2015.7177881