Zobrazeno 1 - 3
of 3
pro vyhledávání: '"Saba Yousefzadeh"'
Autor:
Katayoon Basharkhah, Nooshin Nosrati, Saba Yousefzadeh, Seyedeh Maryam Ghasemi, Zainalabedin Navabi, Maryam Rajabalipanah
Publikováno v:
DDECS
The work presented in this paper is on reconfigurable accelerators for the implementation of iterative computations and loops that form the core computations of applications like those in digital signal processing and machine learning. The accelerato
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b72fc4c036113cabf7ef1046a411ce39
https://doi.org/10.1109/ddecs50862.2020.9095688
https://doi.org/10.1109/ddecs50862.2020.9095688
Autor:
Zainalabedin Navabi, Seyedeh Maryam Ghasemi, Katayoon Basharkhah, Nooshin Nosrati, Saba Yousefzadeh, Maryam Rajabalipanah
Publikováno v:
DFT
Because of heavy repeated computations and concurrency in the execution of many machine learning applications, embedded hardware architectures based on reconfigurable accelerators have emerged as a convenient and efficient means of hardware implement
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::19d74d3e7e4b565f80ff9ffee315293c
https://doi.org/10.1109/dft50435.2020.9250763
https://doi.org/10.1109/dft50435.2020.9250763
Autor:
Jaan Raik, Zainalabedin Navabi, Rezgar Sadeghi, Katayoon Basharkhah, Nooshin Nosrati, Saba Yousefzadeh, Maksim Jenihhin
Publikováno v:
EWDTS
Hardware implementation of many of today's applications such as those in automotive, telecommunication, bio, and security, require heavy repeated computations, and concurrency in the execution of these computations. These requirements are not easily
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e5d73450b1f58e1409ccb2e222505a6e
https://doi.org/10.1109/ewdts.2019.8884481
https://doi.org/10.1109/ewdts.2019.8884481