Zobrazeno 1 - 10
of 53
pro vyhledávání: '"S.V. Cherepko"'
Publikováno v:
IEEE Transactions on Electron Devices. 55:3555-3561
Adaptive biases are proposed for both the drain and the dummy gate of LDMOSFETs to improve their overall efficiency in amplification of highly modulated signals. At low input power, the drain bias is reduced to maintain high efficiency. At high input
Publikováno v:
IEEE Transactions on Device and Materials Reliability. 8:193-202
For the first time, the effects of dummy-gate geometry and bias on breakdown and degradation of LDMOSFETs are quantified both theoretically and experimentally. First, the effects of dummy-gate geometry and bias are analyzed numerically by using a 2-D
Publikováno v:
IEEE Transactions on Electron Devices. 54:580-588
The bias effects of dummy gate on drain current, resistance, capacitance, quasi-saturation, and breakdown of Si laterally diffused MOSFET transistor (LDMOSFET) are modeled and characterized. Two-dimensional numerical simulations are used to explain e
Autor:
S.V. Cherepko, James C. M. Hwang
Publikováno v:
IEEE Transactions on Microwave Theory and Techniques. 51:2531-2537
Large-signal implementation of nonquasi-static (NQS) effects in bipolar transistors is reviewed. An approach is proposed to introduce first-order NQS correction to typical quasi-static phenomenological models. Both charge- and noncharge-conserving im
Publikováno v:
IEEE Transactions on Microwave Theory and Techniques. 50:1084-1094
High-current effects in InGaP/GaAs heterojunction bipolar transistors (HBTs) were modeled and characterized. In addition to the self-heating effect, high currents were found to degrade large-signal performance mainly through Kirk and quasi-saturation
Publikováno v:
Microelectronics Reliability. 39:497-505
The effect of interface trap charge variation during measurement of the MOSFET current–voltage characteristic has been examined. Taking into account this effect, an interface trap density extraction technique is proposed. The transconductance degra
Autor:
S.V. Cherepko, I.N. Shvetzov-Shilovsky, Viacheslav S. Pershenkov, V.V. Abramov, Vladimir V. Belyakov
Publikováno v:
Microelectronics Reliability. 39:133-137
The authors are concerned with the properties of a conventional MOSFET in the bipolar mode of operation. They show that the base current can provide useful information about interface trap density at the Si-SiO/sub 2/ interface. The new device charac
Autor:
Alexander Y. Nikiforov, S.V. Cherepko, V.V. Emelianov, Vladimir V. Belyakov, A.V. Sogoyan, V.N. Ulimov, Viacheslav S. Pershenkov
Publikováno v:
IEEE Transactions on Nuclear Science. 42:1750-1757
The kinetics of rechargable radiation induced electron traps build-up in MOSFETs is investigated. The recharge of these traps is responsible for the threshold voltage forward and reverse annealing under altered polarity gate bias. The electron traps
Publikováno v:
IEEE Transactions on Nuclear Science. 41:2631-2636
The modeling of MOS device response to a low dose rate irradiation has been performed. The existing conversion model based on the linear dependence between positive oxide charge annealing and interface trap buildup accurately predicts the long time r
Publikováno v:
IEEE Transactions on Nuclear Science. 40:1714-1720
A method for low-dose-rate MOS device response prediction based on the linear dependence between positive oxide charge anneal and interface states build-up is presented and experimentally verified. A linear relationship is seen to exist between the b