Zobrazeno 1 - 10
of 40
pro vyhledávání: '"S.G.H. Anderson"'
Autor:
G. Rinkenberger, Erwin J. Prinz, Sherry G. Straub, J. Peschke, Robert F. Steimle, Michael A. Sadd, B. Acred, Jane A. Yater, Rajesh A. Rao, J.C. Ledezma, Ramachandran Muralidhar, Craig T. Swift, J. Hamilton, K.M. Chang, B. Hradsky, S.G.H. Anderson, H.P. Gasquet, Bruce E. White
Publikováno v:
Solid-State Electronics. 49:1722-1727
Silicon nanocrystal memories offer opportunities for voltage scaling and process simplification for embedded non-volatile memories. While electrically isolated nanocrystals mitigate charge loss through oxide defects, the impact of nanocrystal size an
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9f5f6a6ac0124a1147ac6eef4d45b5c4
https://doi.org/10.1016/j.sse.2005.10.022
https://doi.org/10.1016/j.sse.2005.10.022
Autor:
B. Acred, B. Hradsky, Craig T. Swift, Matthew W. Stoker, Michael A. Sadd, Tushar P. Merchant, E. Prinz, S. Straub, K. Harber, M. Rossow, Bruce E. White, J. Yater, R.F. Steimle, Rajesh A. Rao, Ramachandran Muralidhar, S.G.H. Anderson
Publikováno v:
Solid-State Electronics. 48:1463-1473
Si nanocrystal based devices have shown potential in reducing the operating voltages used in continuous floating gate FLASH devices. We discuss the critical aspects of this technology––nanocrystal formation by CVD, nanocrystal passivation, and HC
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0fa65311ba1c44bd19bb94e178394d73
https://doi.org/10.1016/j.sse.2004.03.021
https://doi.org/10.1016/j.sse.2004.03.021
Autor:
David C. Gilmer, R. Garcia, William J. Taylor, Rama I. Hegde, Raghaw S. Rai, J. M. Grant, Hsing-Huang Tseng, Christopher C. Hobbs, V. Dhandapani, Bruce E. White, S.G.H. Anderson, A. Knizhnik, Philip J. Tobin, S. Samavedam, D. Triyoso, E. A. Hebert, M.L. Lovejoy, D. Roan, L. R. C. Fonseca, L. Dip
Publikováno v:
IEEE Transactions on Electron Devices. 51:978-984
We report here that Fermi pinning at the polysilicon/metal-oxide interface causes high threshold voltages in MOSFET devices. In Part I, we investigated the different gatestack regions and determined that the polysilicon/metal oxide interface plays a
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::04255d38837b6f5b3ccad799807525cc
https://doi.org/10.1109/ted.2004.829510
https://doi.org/10.1109/ted.2004.829510
Autor:
C.C. Hobbs, L.R.C. Fonseca, A. Knizhnik, V. Dhandapani, S.B. Samavedam, W.J. Taylor, J.M. Grant, L.G. Dip, D.H. Triyoso, R.I. Hegde, D.C. Gilmer, R. Garcia, D. Roan, M.L. Lovejoy, R.S. Rai, E.A. Hebert, H.-H. Tseng, S.G.H. Anderson, B.E. White, P.J. Tobin
Publikováno v:
IEEE Transactions on Electron Devices. 51:971-977
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::463f291e6b68dab00b5bd0fe55d0e8b5
https://doi.org/10.1109/ted.2004.829513
https://doi.org/10.1109/ted.2004.829513
Autor:
M. Moosa, Philip J. Tobin, G.C.-F. Yeap, Andreas Hegedus, John R. Alvis, T.C. Chua, G. Miner, P. Abramowitz, Yongjoo Jeon, T. Y. Luo, N. Cave, L. Hebert, J.J. Lee, Hsing-Huang Tseng, S.G.H. Anderson, A. Sultan, J. Jeon, J. Jiang
Publikováno v:
IEEE Electron Device Letters. 23:704-706
Balancing gate leakage reduction, device performance, and gate dielectric reliability is a major challenge for oxynitride used as a gate dielectric for advanced technology. As compared to RTONO oxynitride, pMOSFET threshold voltage shift and transcon
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0211d10f9e4bbf45be0ca8d396f7bd5c
https://doi.org/10.1109/led.2002.805758
https://doi.org/10.1109/led.2002.805758
Autor:
Jane A. Yater, K.M. Chang, Rajesh A. Rao, Michael A. Sadd, B. Acred, J. Peschke, Craig T. Swift, Bruce E. White, B. Hradsky, S.G.H. Anderson, Ramachandran Muralidhar, S. Straub, Erwin J. Prinz, B. Steimle
Publikováno v:
63rd Device Research Conference Digest, 2005. DRC '05..
Theimpact ofnanocrystal [NC]number density, size and areal coverage ontheprogram-erase characteristics, data retention anddisturbs ofnanocrystal memorydevices is investigated. Itisshownthat thememorywindow, data retention, andreaddisturb arerelativel
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0e095e34378d93dcbd1b969a7a099edf
https://doi.org/10.1109/drc.2005.1553044
https://doi.org/10.1109/drc.2005.1553044
Autor:
D. Hadad, Bruce E. White, W. Paulson, B. Acred, W. Chen, Michael A. Sadd, K. Harber, Sherry G. Straub, L. Parker, B. Hradsky, Craig T. Swift, M. Paransky, S.G.H. Anderson, Rajesh A. Rao, T. Huynh, L. Grieve, Marc A. Rossow, Erwin J. Prinz, Robert F. Steimle, K.M. Chang, Ramachandran Muralidhar, Tushar P. Merchant, Jane A. Yater
Publikováno v:
2004 International Conference on Integrated Circuit Design and Technology (IEEE Cat. No.04EX866).
This paper reports on the first functional 6V, 4Mb silicon nanocrystal based nonvolatile memory array using conventional 90nm and 0.25/spl mu/m process technologies. The silicon nanocrystal based NOR Flash can be programmed and erased using conventio
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::454a2bd29580098336049a16d201dcb5
https://doi.org/10.1109/icicdt.2004.1309900
https://doi.org/10.1109/icicdt.2004.1309900
Autor:
L. R. C. Fonseca, Christopher C. Hobbs, Alexander A. Demkov, D. Triyoso, Bruce E. White, E. Luckowski, J. Schaeffer, R. Garcia, L.B. La, Rama I. Hegde, V. Dhandapani, D. Roan, Srikanth B. Samavedam, W.J. Taylor, Mark V. Raymond, David Gilmer, Arturo M. Martinez, C. Capasso, O. Adetutu, K. Moore, J. M. Grant, Philip J. Tobin, S.G.H. Anderson, H.-H. Tseng
Publikováno v:
IEEE International Electron Devices Meeting 2003.
We have examined the impact of small and systematic changes at the metal/dielectric interface on metal work-function and report on Fermi level pinning of TaN, TaSiN and TiN gates on SiO/sub 2/, Al/sub 2/O/sub 3/ and HfO/sub 2/ for the first time. The
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6ba6826ba65207209b3beea630b55b77
https://doi.org/10.1109/iedm.2003.1269286
https://doi.org/10.1109/iedm.2003.1269286
Autor:
Bruce E. White, Ramachandran Muralidhar, Michael A. Sadd, R.F. Steimle, Wei-Ming Chen, S. Straub, T. Huynh, B. Acred, K. Harber, Erwin J. Prinz, S.G.H. Anderson, L. Parker, J. Yater, Rajesh A. Rao, B. Hradsky, Craig T. Swift, Ko-Min Chang, L. Grieve, Wayne M. Paulson, Tushar P. Merchant, M. Rossow, M. Paransky, D. Hadad
Publikováno v:
IEEE International Electron Devices Meeting 2003.
The first functional 6 V, 4 Mb silicon nanocrystal based nonvolatile memory arrays using conventional 90 nm and 0.25 /spl mu/m process technologies have been produced. The technology can be programmed and erased using conventional techniques in float
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::54ecb995162788ec718a55f0032804da
https://doi.org/10.1109/iedm.2003.1269353
https://doi.org/10.1109/iedm.2003.1269353
Autor:
Seung-Chul Song, S. Venkatesan, A. Perera, Stanley M. Filipiak, Laegu Kang, F. Huang, Byoung W. Min, S. Tukunang, D. Menke, M. Turner, S.G.H. Anderson
Publikováno v:
2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.01CH37303).
Significantly reduced plasma damage is demonstrated by including a thin conductive top film (CTF) on the contact etch stop layer (ESL) for the first time, which effectively blocks radiation generated by subsequent high density plasma processes. We al
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8c4fba2a5709c6f211b825bbfc766eaa
https://doi.org/10.1109/vlsit.2002.1015393
https://doi.org/10.1109/vlsit.2002.1015393