Zobrazeno 1 - 10
of 169
pro vyhledávání: '"S. Ramey"'
A Unified Aging Model Framework Capturing Device to Circuit Degradation for Advance Technology Nodes
Publikováno v:
2023 IEEE International Reliability Physics Symposium (IRPS).
Publikováno v:
2023 IEEE International Reliability Physics Symposium (IRPS).
Akademický článek
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Publikováno v:
Behavioral Interventions. 37:887-897
Autor:
Erica S. Ramey
Publikováno v:
Journal of Psychosocial Nursing and Mental Health Services. :1-2
Publikováno v:
2022 IEEE International Reliability Physics Symposium (IRPS).
Publikováno v:
IRPS
With continuous channel length scaling and ongoing demand for higher operating frequencies, HCI degradation and combining BTI and HCI aging mechanisms in compact aging models becomes important for accurately capturing end-of-life circuit behavior. We
Autor:
Benjamin J. Orr, Nathan Jack, C. Auth, A. Schmitz, Tony Acosta, Steven S. Poon, Che-Yun Lin, Abdur Rahman, C. AnDyke, Rahim Kasim, K. Downes, G. McPherson, Sunny Chugh, Madhavan Atul, D. Nminibapiel, Adam Neale, K. Sethi, Seung Hwan Lee, S. Ramey, Tanmoy Pramanik, Michael L. Hattendorf, Emre Armagan, J. Palmer, Subhash M. Joshi, Ian R. Post, C. M. Pelto, P. Nayak, Yeoh Andrew W, G. Martin, Gerald S. Leatherman, H. Wu, N. Seifert, A. Lowrie, R. Grover, H. Mao
Publikováno v:
IRPS
We provide a comprehensive overview of the reliability characteristics of Intel’s 10+ logic technology. This is a 10 nm technology featuring the third generation of Intel’s FinFETs, seventh generation of strained silicon, fifth generation of high
Autor:
Jeffery Hicks, Swaroop Kumar Namalapuri, S. Ramey, Jihan Standfest, A. H. Davoody, Balkaran Gill, P Supriya, T. Mutyala, Ketul B. Sutaria, Inanc Meric
Publikováno v:
IRPS
Circuit reliability is a significant concern in scaled technologies. Physical aging models derived by DC stress on discrete devices are accurate to an extent, but can be further improved by evaluating the behaviour of simple circuits such as ring osc
Autor:
C.-Y. Su, M. Maksud, James Waldemer, David Young, J. Palmer, S. Ramey, Mark Armstrong, H. Li, C. Perini, L. Paulson, M. El-tanani, H. Greve, Benjamin J. Orr, Sunny Chugh, Y. Yang
Publikováno v:
IRPS
The 22FFL technology developed for operation to 3.3V is used to investigate process and design considerations required to extend technology capability to 12 V applications. A prototype chip was carefully designed in close consideration with the techn