Zobrazeno 1 - 10
of 30
pro vyhledávání: '"S. Oetiker"'
Autor:
André Meichtry, Markus Ernst, Jaana Suni, Markku Kankaanpää, S. Oetiker, Fabian Rast, Christoph Bauer, Jan Kool, Saara M. Rissanen
Publikováno v:
Physiotherapy. 102:e74-e75
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c3dd48ca8d188c09475c26c0f2b390a6
https://doi.org/10.1016/j.physio.2016.10.070
https://doi.org/10.1016/j.physio.2016.10.070
Publikováno v:
IEEE Journal of Solid-State Circuits. 35:1732-1743
Real-time motion pictures providing image quality superior to that of standard video in terms of resolution and color fidelity are often required. In many applications, e.g., in biomedicine or machine vision, only cameras with a single charge-coupled
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8b8823a8a3eb01f7bae5489b1f8713ca
https://doi.org/10.1109/4.881221
https://doi.org/10.1109/4.881221
Publikováno v:
ASYNC
The Integrated Systems Laboratory (IIS) of ETH Zurich (Swiss Federal Institute of Technology) has been active in globally-asynchronous locally-synchronous (GALS) research since 1998. During this time, a number of GALS circuits have been fabricated an
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9f205c485de88e594e076745d97516d5
https://doi.org/10.1109/async.2006.18
https://doi.org/10.1109/async.2006.18
Publikováno v:
Proceedings of the 31st European Solid-State Circuits Conference, 2005. ESSCIRC 2005..
Side channel analysis attacks, and particularly differential power analysis (DPA), pose a serious threat to cryptographic security. This is partly because the synchronous operation of traditional cipher hardware affords a fairly good correlation betw
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4440205ee682a7ce60d06855cbbb6269
https://doi.org/10.1109/esscir.2005.1541646
https://doi.org/10.1109/esscir.2005.1541646
Autor:
Frank K. Gurkaynak, Hubert Kaeslin, T. Villiger, Norbert Felber, Wolfgang Fichtner, S. Oetiker
Publikováno v:
ASYNC
In this paper, we present a high-level functional test methodology for GALS systems. In this new test methodology, the self-timed wrapper of a GALS module is enhanced by a test extension element that provides a unified interface to a centralized test
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0bfd8239e6c902356881e8402acf5878
https://doi.org/10.1109/async.2002.1000308
https://doi.org/10.1109/async.2002.1000308
Publikováno v:
ASYNC
The lack of proven mechanisms for transferring data between multiple synchronous islands has been a major impediment for applying globally asynchronous locally synchronous (GALS) techniques to SoC design. We have implemented on a VLSI test chip three
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a2b512313036d855df35f4cbc3d6dacf
https://doi.org/10.1109/async.2003.1199174
https://doi.org/10.1109/async.2003.1199174
Autor:
Frank K. Gurkaynak, P. Rommens, A. K. Lutz, Wolfgang Fichtner, J. Treichler, S. Oetiker, Hubert Kaeslin, Antonia Erni, S. Reichmuth, G. Basler
Publikováno v:
Cryptographic Hardware and Embedded Systems-CHES 2002 ISBN: 9783540004097
CHES
CHES
We present and evaluate efficient VLSI implementations of both Rijndael and Serpent. The two cipher algorithms have been implemented by two comparable design teams within the same timeframe using the same fabrication process and EDA tools. We are thu
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::931b0d5d8350454d86ebbc945cbf8070
https://doi.org/10.1007/3-540-36400-5_12
https://doi.org/10.1007/3-540-36400-5_12
Publikováno v:
2000 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.00CH37056).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::bf0437562d32fc06cffafdd828c38672
https://doi.org/10.1109/isscc.2000.839763
https://doi.org/10.1109/isscc.2000.839763
Publikováno v:
Electronic Notes in Theoretical Computer Science. (2):133-149
In recent years several successful GALS realizations have been presented. The core of a GALS system is a locally synchronous island that is designed using industry standard synchronous design methodologies. In principle, any functional synchronous bl
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::698390509af58706f94aea284017d058
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