Zobrazeno 1 - 10
of 16
pro vyhledávání: '"S. Moccio"'
Autor:
Martin L. Green, B. E. Weir, T.W. Sorsch, P. J. Silverman, David A. Muller, Y.O. Kim, S. Moccio, Gregory Timp
Publikováno v:
Microelectronic Engineering. 48:25-30
In spite of its many attributes such as nativity to silicon, low interfacial defect density, high melting point, large energy gap, high resistivity, and good dielectric strength, SiO 2 suffers from one disadvantage, low dielectric constant (K=3.9). T
Publikováno v:
Nature. 399:758-761
The narrowest feature on present-day integrated circuits is the gate oxide—the thin dielectric layer that forms the basis of field-effect device structures. Silicon dioxide is the dielectric of choice and, if present miniaturization trends continue
Publikováno v:
Applied Physics Letters. 74:272-274
Determining the cross-sectional doping profile of very small metal–oxide–semiconductor field effect transistors and specifically the direct measurement of their channel length is necessary for true channel engineering to be possible. Scanning cap
Autor:
B. E. Weir, A. Ghetti, Don Monroe, P.J. Silverman, S. Moccio, M.A. Alam, J. Bude, K.P. Cheung
Publikováno v:
International Electron Devices Meeting 1999. Technical Digest (Cat. No.99CH36318).
A comprehensive percolation model is used to explore the role of non-uniform trap generation process on oxide breakdown. We show that this non-uniform trap generation (due to SILC and roughness induced localization) makes interpretation of experiment
Autor:
G. Forsyth, Y.O. Kim, S. Moccio, J. Bude, K.K. Bourdelle, Gregory Timp, Winston Timp, Rafael N. Kleiman, William M. Mansfield, T.W. Sorsch, A. Ghetti, Martin L. Green, F.P. Klemens, C. Lochstampfor, A. Kornblit, H.-J. Gossmann, Donald M. Tennant, R. Tung, J. P. Garno
Publikováno v:
International Electron Devices Meeting 1999. Technical Digest (Cat. No.99CH36318).
We have achieved extremely high drive current performance and ballistic (T>0.8) transport using ultra-thin (
Autor:
G. Timp, K.K. Bourdelle, J.E. Bower, F.H. Baumann, T. Boone, R. Cirelli, K. Evans-Lutterodt, J. Garno, A. Ghetti, H. Gossmann, M. Green, D. Jacobson, Y. Kim, R. Kleiman, F. Klemens, A. Kornlit, C. Lochstampfor, W. Mansfield, S. Moccio, D.A. Muller, I.E. Ocola, M.I. O'Malley, J. Rosamilia, J. Sapjeta, P. Silverman, T. Sorsch, D.M. Tennant, W. Timp, B.E. Weir
Publikováno v:
International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217).
One of the primary means for improving performance and increasing the scale of integration on a chip is the miniaturization of the electronic devices that comprise it. The SIA roadmap projects that future gains in performance will continue to accrue
Autor:
G. Timp, A. Agarwal, K.K. Bourdella, J. Bower, T. Boone, A. Ghetti, M. Green, J. Gamo, H. Gossmann, D. Jacobson, R. Kleiman, A. Kornblit, F. Klemens, S. Moccio, M.L. O'Malley, L. Ocola, J. Rossm-nalia, J. Sapjeta, P. Silverman, T. Sorsch, W. Timp, D. Tennani
Publikováno v:
International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217).
Reports measurements of the DC characteristics of sub-100nm pMOSFETs that employ low leakage, ultra-thin gate oxides only 1-2nm thick and ultra-shallow junctions to achieve high current drive capability and transconductance. We demonstrate that I/sub
Autor:
Vincent M. Donnelly, S. Moccio, Martin L. Green, K.H.A. Bogart, J. Sapjeta, T. Sorsch, P. Silvermann, T. Boone, J. Rosamilia, B. E. Weir, C.Y. Kim, G. Timp, K. Evans-Lutterodt, Winston Timp, Frieder H. Baumann
Publikováno v:
Scopus-Elsevier
We report our assessment of the limitation imposed by the tunneling current density on the scaling of stoichiometric oxides grown by rapid thermal oxidation at 1000/spl deg/C over thicknesses ranging from 0.5-3 nm.
Autor:
G. Timp, A. Agarwal, F.H. Baumann, T. Boone, M. Buonanno, R. Cirelli, V. Donnelly, M. Foad, D. Grant, M. Green, H. Gossmann, S. Hillenius, J. Jackson, D. Jacobson, R. Kleiman, A. Komblit, F. Klemens, J.T.-C. Lee, W. Mansfield, S. Moccio, A. Murrell, M. O'Malley, J. Rosamilia, J. Sapjeta, P. Silverman, T. Sorsch, W.W. Tai, D. Tennant, H. Vuong, B. Weir
Publikováno v:
International Electron Devices Meeting. IEDM Technical Digest.
Reports measurements of the DC characteristics of sub-100 nm nMOSFETs that employ low leakage ultra-thin gate oxides only 1-2 nm thick to achieve high current drive capability and transconductance. We demonstrate that I/sub Dsat//spl ap/1.8 mA//spl m
Autor:
T.W. Sorsch, F. Klemens, S. Moccio, K.K. Bourdelle, Gregory Timp, H.-J. Gossmann, P. J. Silverman, Donald M. Tennant, T. Boone, Winston Timp, J. Rosamilia, B. E. Weir, J. Bude, Young-Jin Kim, Avi Kornblit, Martin L. Green, A Ghetti, Frieder H. Baumann, R. Tung, Rafael N. Kleiman, David A. Muller, J. P. Garno
Publikováno v:
Scopus-Elsevier
The narrowest feature of an integrated circuit is the silicon dioxide gate dielectric (3–5 nm). The viability of future CMOS technology is contingent upon thinning the oxide further to improve drive performance, while maintaining reliability. Pract
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