Výsledky vyhledávání - "S. L. Kriangsak"

Multi chip stacking & reliability challenges using TSV-micro C4 solder interconnection for FCCSP TSV package

Autor: K. Y. Au, Y.B. Yang, S Nathapong, Y. S. Koh Drake, P. L Ong Wilson, S. L. Kriangsak, Y. F. Zhang, J.D. Beleran

Publikováno v: 2011 IEEE 13th Electronics Packaging Technology Conference.

Through silicon via (TSV) is a three-dimensional packaging technology involving vertical chips stacking using metal-filled via holes and bumps. TSV stacked chip drastically reduces interconnect distance than conventional multi-stack wire bond silicon

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::e959db6a93edf0b3156d0cdc5198a0ff
https://doi.org/10.1109/eptc.2011.6184493

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Thru silicon via stacking & numerical characterization for multi-die interconnections using full array & very fine pitch micro C4 bumps

Autor: C. Surasit, John D. Beleran, K. Y. Au, C. H. Toh, Y.B. Yang, Y. F. Zhang, Y. S. Koh Drake, P. L Ong Wilson, S. L. Kriangsak

Publikováno v: 2011 IEEE 61st Electronic Components and Technology Conference (ECTC).

High performance, multi functional and package miniaturization will be the main driving forces that propel the future trend and development of fully integrated multi silicon dies stack using through silicon via (TSV) packaging technology. This paper

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::97d25bd0697c326b473be127bdb34152
https://doi.org/10.1109/ectc.2011.5898529

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3D interconnection process development and integration with low stress TSV

Autor: Chee Houe Khong, W. S. Lee, Soon Wee Ho, C. H. Toh, Li Shiah Lim, S Nathapong, S. P. Chew, T. T. Chua, C. Ng, Hongyu Li, S. L. Kriangsak, X. F. Pang, Ebin Liao

Publikováno v: 2010 Proceedings 60th Electronic Components and Technology Conference (ECTC).

The 3 D interconnect technology with Thru Silicon Via (TSV) have gained tremendous advancement in recent years. Final adoption of TSV technologies requires a robust and cost competitive TSV processes. Sidewall plated TSV with polymer filling can redu

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::73ab3cd014594ce0750fae486279e72d
https://doi.org/10.1109/ectc.2010.5490728

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3D chip stacking & reliability using TSV-micro C4 solder interconnection

Autor: C. H. Toh, W.H. Zhu, K. Y. Au, X.R. Zhang, S. L. Kriangsak

Publikováno v: 2010 Proceedings 60th Electronic Components and Technology Conference (ECTC).

Multi silicon dies stack using through silicon via (TSV) is required for higher performance, greater package miniaturization and more functionality electronic device. A through silicon interposer (TSI) enables interconnect pitch matching between a hi

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::f322adaf696be96d387bda78d047387f
https://doi.org/10.1109/ectc.2010.5490636

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