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Autor:
Al F. Tasch, M. Manassian, Christine M. Maziar, Haihong Wang, G. Chindalore, S. Jallepalli, S.A. Hareland, W.-K. Shih
Publikováno v:
IEEE Transactions on Electron Devices. 45:1487-1493
In this paper, models appropriate for device simulators are developed which account for the quantum mechanical nature of accumulated regions. Accumulation layer quantization is important in deep submicron (/spl les/0.25 /spl mu/m) MOS devices in the
Autor:
Al F. Tasch, W.-K. Shih, Christine M. Maziar, G. Chindalore, S.A. Hareland, S. Jallepalli, Haihong Wang
Publikováno v:
IEEE Transactions on Electron Devices. 45:179-186
As MOS devices have been successfully scaled to smaller feature sizes, thinner gate oxides and higher levels of channel doping have been used in order to simultaneously satisfy the need for high drive currents and minimal short-channel effects. With
Publikováno v:
Journal of Applied Physics. 81:2250-2255
Hole transport in bulk silicon is explored using an efficient and accurate Monte Carlo (MC) tool based on the local pseudopotential band structure. Acoustic and optical phonon scattering, ionized impurity scattering, and impact ionization are the dom
Autor:
Khaled Hasnat, W.-K. Shih, S.A. Hareland, Al F. Tasch, V.M. Agostinelli, S. Jallepalli, Choh-Fei Yeap, Christine M. Maziar
Publikováno v:
IEEE Transactions on Electron Devices. 44:129-138
A thermionic emission model based on a non-Maxwellian electron energy distribution function for the electron gate current in NMOSFET's is described. The model uses hydrodynamic equations to describe more correctly the electron transport and gate inje
Autor:
S.A. Hareland, S. Jallepalli, Choh-Fei Yeap, Al F. Tasch, V.M. Agostinelli, W.-K. Shih, Christine M. Maziar, Khaled Hasnat
Publikováno v:
IEEE Transactions on Electron Devices. 43:1264-1273
An energy parameterized pseudo-lucky electron model for simulation of gate current in submicron MOSFET's is presented in this paper. The model uses hydrodynamic equations to describe more correctly the carrier energy dependence of the gate injection
Autor:
C.M. Maziar, S. Jallepalli, K. Hasnat, Al F. Tasch, Shyam Krishnamurthy, Choh-Fei Yeap, S.A. Hareland
Publikováno v:
IEEE Transactions on Electron Devices. 43:90-96
Successful scaling of MOS device feature size requires thinner gate oxides and higher levels of channel doping in order to simultaneously satisfy the need for high drive currents and minimal short-channel effects. However, in deep submicron (/spl les
Publikováno v:
IEEE Transactions on Electron Devices. 47:643-645
This work presents for the first time experimental results for the extraction of the increase in the effective electrical oxide thickness (/spl Delta/t/sub ox/=t/sub ox,expt/-t/sub ox,physical/) in MOS accumulation layers with heavily doped substrate
Autor:
S. Smith, Al F. Tasch, G. Chindalore, Christine M. Maziar, S.A. Hareland, V.K.F. Chia, S. Jallepalli
Publikováno v:
IEEE Electron Device Letters. 18:206-208
The authors report for the first time, accurately extracted experimental data for the threshold voltage shift (/spl Delta/V/sub T/) due to quantum mechanical (QM) effects in hole inversion layers in MOS devices, Additional experimental results are pr
Autor:
J. Mogab, M. Zavala, Jerry G. Fossum, Colita Parker, D. Sing, R. Rai, J. Hughes, A. Vandooren, Bich-Yen Nguyen, Yang Du, Leo Mathew, Bruce E. White, W. Zhang, Rode R. Mora, Rob Shimer, S. Kalpat, Michael A. Sadd, Tab A. Stephens, G.O. Workman, S. Jallepalli, Aaron Thean
Publikováno v:
2004 IEEE International SOI Conference (IEEE Cat. No.04CH37573).
Perfectly self aligned vertical multiple independent gate field effect transistor (MIGFET) CMOS devices have been fabricated. The unique process used to fabricate these devices allow them to be integrated with FinFET devices. Device and circuit simul