Zobrazeno 1 - 10
of 55
pro vyhledávání: '"S. Degendt"'
Autor:
M. A. Reading, Androula G. Nassiopoulou, Andrea Parisini, Emmanouel Hourdakis, Thierry Conard, S. Degendt, M. Theodoropoulou, Jakob Van den Berg
Publikováno v:
ECS Transactions. 25:363-372
We present a detailed characterization of thin high-k Hf-based dielectric/SiO2 stacks on Si by electrical measurements (capacitance - voltage (C-V) and current-voltage (I-V)), structural analysis using transmission electron microscopy (TEM) and compo
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::fbbcf0d3dfc790be01c2d66a8c336ee1
https://doi.org/10.1149/1.3204426
https://doi.org/10.1149/1.3204426
Publikováno v:
Microelectronic Engineering. 84:2209-2212
This paper uses combinatorial methodologies to investigate the effect of TaN-AlN metal gate electrode composition on the work function, for (TaN-AlN)/Hf-Si-O/SiO"2/Si capacitors. We demonstrate the efficacy of the combinatorial technique by plotting
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::43e80e4c9579c72719bfef70231db635
https://doi.org/10.1016/j.mee.2007.04.128
https://doi.org/10.1016/j.mee.2007.04.128
Autor:
Guido Groeseneken, E. San Andrés, Maria Toledano-Luque, Barry O'Sullivan, J. Ramos, S. DeGendt, Philippe Roussel, Luigi Pantisano
Publikováno v:
IEEE Transactions on Electron Devices. 54:1705-1712
We present an experimental methodology that demonstrates the suitability of the conventional three-lumped- parameter model for gate impedance of MOSFET devices at frequencies from dc to the gigahertz range, which permits accurate extraction of model
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::71b63ac8380a98a82a1acd08e34e0f6d
https://doi.org/10.1109/ted.2007.898473
https://doi.org/10.1109/ted.2007.898473
Autor:
Barry O'Sullivan, V. Kaushik, M.M. Heyns, Lars-Ake Ragnarsson, Luigi Pantisano, J.-L. Everaert, S. DeGendt, E. Rohr, Lionel Trojman
Publikováno v:
IEEE Transactions on Electron Devices
IEEE Transactions on Electron Devices, Institute of Electrical and Electronics Engineers, 2007, 54 (7), pp.1771-1775. ⟨10.1109/TED.2007.898460⟩
IEEE Transactions on Electron Devices, Institute of Electrical and Electronics Engineers, 2007, 54 (7), pp.1771-1775. ⟨10.1109/TED.2007.898460⟩
The results of a systematic study on the effects of nitrogen incorporation into (60%Hf/40%Si) hafnium silicate/SiO2 dielectric stacks are presented. Several nitridation methods and processes are compared as a function of the highest performing SiO2 i
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::cbfafe196bbac673784c6f7b7e1f0a8a
https://doi.org/10.1109/ted.2007.898460
https://doi.org/10.1109/ted.2007.898460
Autor:
Valery V. Afanas'ev, Andre Stesmans, Lars-Ake Ragnarsson, Michel Houssa, M.M. Heyns, Luigi Pantisano, Tom Schram, Guido Groeseneken, S. DeGendt, Robin Degraeve
Publikováno v:
Materials Science in Semiconductor Processing. 9:880-884
The integration of high- κ dielectrics in MOSFET devices is beset by many problems. In this paper a review on the impact of defects in high- κ materials on the MOSFET electrical characteristics is presented. Beside the quality of the bulk of the di
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::144afb5fcea21109949710bb4d361f92
https://doi.org/10.1016/j.mssp.2006.10.048
https://doi.org/10.1016/j.mssp.2006.10.048
Autor:
Johan Vertommen, Stephan Beckx, V. Paraschiv, B. Coenegrachts, Serge Biesemans, K. Henson, S. Degendt, Patrick Jaenen, S. Vanhaelemeersch, S. Locorotondo, M. Demand, Denis Shamiryan, Werner Boullart, Martine Claes
Publikováno v:
Microelectronics Reliability. 45:1007-1011
We report on gate patterning development for the 45 nm node and beyond. Both poly-Si and different metal gates in combination with medium- k and high- k dielectrics have been defined. Source/drain silicon recess has been characterized for different s
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::108e65e8b0860190dd7efdce10c52439
https://doi.org/10.1016/j.microrel.2004.11.005
https://doi.org/10.1016/j.microrel.2004.11.005
Autor:
Els Kesters, R. De Waele, S. Degendt, Karine Kenis, Rita Vos, Denis Shamiryan, Tom Schram, Sylvain Garaud, Gabriela Catana, Marcel Lux, Harald Kraus, Wim Deweerd, James Snow, Paul Mertens
Publikováno v:
Solid State Phenomena. :241-244
In this work the removal of different metallic and particulate contaminants relevant for high-k/metal gate processing is studied. Best cleaning efficiency of both silicon and nitride substrates is achieved using a HF/HNO3-based cleaning resulting in
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5fde0a5436df9028c25f6b2a826520cc
https://doi.org/10.4028/www.scientific.net/ssp.103-104.241
https://doi.org/10.4028/www.scientific.net/ssp.103-104.241
Autor:
Matty Caymax, V. Cosnier, R. J. Carter, Eric Garfunkel, Thierry Conard, Torgny Gustafsson, J.W. Maes, Wilman Tsai, Marko Tuominen, M.M. Heyns, W. H. Schulte, J. Petry, O. Richard, E. Young, S. DeGendt, Chao Zhao, Wilfried Vandervorst, H. Nohira
Publikováno v:
Microelectronic Engineering. 65:259-272
The effects of various interface preparations on atomic layer chemical vapor deposition (ALCVD) deposited Al2O3 and ZrO2 dielectrics properties were investigated by X-ray photoelectron spectroscopy (XPS), attenuated total reflection Fourier transform
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::cc136b2e672ff9a1bdd665e53b2beee4
https://doi.org/10.1016/s0167-9317(02)00898-5
https://doi.org/10.1016/s0167-9317(02)00898-5
Autor:
Vidya Kaushik, E. Rohr, M.M. Heyns, Barry O'Sullivan, Lars-Ake Ragnarsson, N. Van Hoornick, S. DeGendt, B. Onsia
Publikováno v:
IEEE Electron Device Letters. 27:546-548
A technique has been developed to fabricate transistors using a continuously scaled 0-2.5-nm SiO/sub 2/ interface layer between a silicon substrate and high-/spl kappa/ dielectric, on a single wafer. The transistor results are promising with good mob
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5e54b68d20fc3d24f460b1b383ce25fe
https://doi.org/10.1109/led.2006.876308
https://doi.org/10.1109/led.2006.876308
Autor:
Stefan Kubicek, R. Singanamalla, S. DeGendt, Hui Yu, T. Y. Hoffmann, Philippe Absil, R. Mitsuhashi, Serge Biesemans, Anabela Veloso, Stephan Brus, S. Van Elshocht, Jorge A. Kittl, Christa Vrancken, Shou-Zen Chang, Rita Vos, Thomas Kauerauf, B. Onsia, X. Shi, Malgorzata Jurczak, Marc Demand, M. Niwa, Anne Lauwers, K.M. Yin, P. Lehnen, Christoph Adelmann
Publikováno v:
2007 IEEE Symposium on VLSI Technology.
This paper reports a novel approach to implement low Vt Ni-FUSI bulk CMOS by using a dysprosium oxide (DyO) cap layer on both HfSiON and SiON host dielectrics. We show for the first time that an ultra-thin DyO cap layer (5 Aring) can lower the NiSi F
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b4e6eee5af9a947565616c86d1eefc17
https://doi.org/10.1109/vlsit.2007.4339710
https://doi.org/10.1109/vlsit.2007.4339710