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pro vyhledávání: '"S. Agnello 2"'
Autor:
F. Giannazzo 1, G. Fisichella 1, A. Piazza 1, 2, 3, S. Di Franco 1, G. Greco 1, S. Agnello 2, F. Roccaforte 1
Publikováno v:
Physica status solidi. Rapid research letters
info:cnr-pdr/source/autori:F. Giannazzo 1, G. Fisichella 1, A. Piazza 1,2,3, S. Di Franco 1, G. Greco 1, S. Agnello 2, F. Roccaforte 1/titolo:Effect of temperature-bias annealing on the hysteresis and subthreshold behavior of multilayer MoS2 transistors/doi:10.1002%2Fpssr.201600209/rivista:Physica status solidi. Rapid research letters (Print)/anno:2016/pagina_da:797/pagina_a:801/intervallo_pagine:797–801/volume:10
info:cnr-pdr/source/autori:F. Giannazzo 1, G. Fisichella 1, A. Piazza 1,2,3, S. Di Franco 1, G. Greco 1, S. Agnello 2, F. Roccaforte 1/titolo:Effect of temperature-bias annealing on the hysteresis and subthreshold behavior of multilayer MoS2 transistors/doi:10.1002%2Fpssr.201600209/rivista:Physica status solidi. Rapid research letters (Print)/anno:2016/pagina_da:797/pagina_a:801/intervallo_pagine:797–801/volume:10
The transfer characteristics (ID-VG) of multilayers MoS2 transistors with a SiO2/Si backgate and Ni source/drain contacts have been measured on as-prepared devices and after annealing at different temperatures (T-ann from 150 degrees C to 200 degrees
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::bad03450a699c5094d0e1b7ba3e13cfe
http://hdl.handle.net/10447/225204
http://hdl.handle.net/10447/225204