Zobrazeno 1 - 10
of 35
pro vyhledávání: '"Sébastien Faucou"'
Autor:
Sébastien Faucou, Mikaël Briday, Vincent Lostanlen, Mathieu Lagrange, Antoine Bernabeu, Jean-Luc Béchennec
Publikováno v:
Audio Mostly Conference
This position paper advocates for digital sobriety in the design and usage of wireless acoustic sensors. As of today, these devices all rely on batteries, which are either recharged by a human operator or via solar panels. Yet, batteries contain chem
Autor:
Vincent Lostanlen, Antoine Bernabeu, Jean-Luc Béchennec, Mikaël Briday, Sébastien Faucou, Mathieu Lagrange
Publikováno v:
Proceedings of the International Workshop on the Internet of Sounds (IWIS)
Proceedings of the International Workshop on the Internet of Sounds (IWIS), Audio Mostly, Sep 2021, Trento, Italy
HAL
Proceedings of the International Workshop on the Internet of Sounds (IWIS), Audio Mostly, Sep 2021, Trento, Italy
HAL
International audience; This position paper advocates for digital sobriety in the design and usage of wireless acoustic sensors. As of today, these devices all rely on batteries, which are either recharged by a human operator or via solar panels. Yet
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=dedup_wf_001::cd0c953b0bfe2d91b6cd3da47c2e0bc2
https://hal.archives-ouvertes.fr/hal-03324622/file/lostanlen2021iwis.pdf
https://hal.archives-ouvertes.fr/hal-03324622/file/lostanlen2021iwis.pdf
Publikováno v:
IEEE Design & Test
IEEE Design & Test, IEEE, 2018, ⟨10.1109/MDAT.2018.2791801⟩
IEEE Design & Test, IEEE, 2018, ⟨10.1109/MDAT.2018.2791801⟩
International audience; —When testing a time-critical system, some scenarios can be hard to run when acting only on the input sequence. The proper execution of a given scenario might require for instance a minimal execution time for a given piece o
Autor:
Sébastien Faucou, Luis Miguel Pinho
Publikováno v:
Real-Time Systems
Real-Time Systems, Springer Verlag, 2018, 54 (4), pp.797-799. ⟨10.1007/s11241-018-9317-8⟩
Real-Time Systems, Springer Verlag, 2018, 54 (4), pp.797-799. ⟨10.1007/s11241-018-9317-8⟩
International audience
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::a51d8add39b5ab90b97eb88899d9d941
https://hal.archives-ouvertes.fr/hal-01902125
https://hal.archives-ouvertes.fr/hal-01902125
Publikováno v:
EDCC
14th European Dependable Computing Conference (EDCC)
14th European Dependable Computing Conference (EDCC), Sep 2018, Iasi, Romania. ⟨10.1109/edcc.2018.00016⟩
14th European Dependable Computing Conference (EDCC)
14th European Dependable Computing Conference (EDCC), Sep 2018, Iasi, Romania. ⟨10.1109/edcc.2018.00016⟩
Nowadays complete systems can be built on a System-on-a-Programmable-Chip that integrates a microcontroller and a FPGA fabric into a single chip. Beside its traditional use to implement hardware accelerators, the FPGA can be used to monitor the softw
Publikováno v:
ACM Transactions on Embedded Computing Systems (TECS)
ACM Transactions on Embedded Computing Systems (TECS), ACM, 2015, 14 (4), pp.1-25. ⟨10.1145/2786979⟩
ACM Transactions on Embedded Computing Systems (TECS), ACM, 2015, 14 (4), pp.1-25. ⟨10.1145/2786979⟩
This article introduces STM-HRT, a nonblocking wait-free software transactional memory (STM) for hard real-time (HRT) multicore embedded systems. Resource access control in HRT systems is usually implemented with lock-based synchronization. However,
Publikováno v:
Verification and Evaluation of Computer and Communication Systems. VECoS 2017
Verification and Evaluation of Computer and Communication Systems. VECoS 2017, Aug 2017, Montréal, Canada. pp.64--78, ⟨10.1007/978-3-319-66176-6_5⟩
Lecture Notes in Computer Science ISBN: 9783319661759
VECoS
Verification and Evaluation of Computer and Communication Systems. VECoS 2017, Aug 2017, Montréal, Canada. pp.64--78, ⟨10.1007/978-3-319-66176-6_5⟩
Lecture Notes in Computer Science ISBN: 9783319661759
VECoS
In this paper, we investigate the case for model checking in the WCET analysis of pipelined processors with dynamic branch and target prediction. We consider a microarchitecture inspired by the e200z4 Power 32-bit architecture, with an instruction ca
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::6d0e81c8076df36d0686017006dad65e
https://hal.archives-ouvertes.fr/hal-01713094
https://hal.archives-ouvertes.fr/hal-01713094
Publikováno v:
2016 11th IEEE Symposium on Industrial Embedded Systems (SIES)
2016 11th IEEE Symposium on Industrial Embedded Systems (SIES), May 2016, Cracovie, Poland. SIES 2016 paper 16, ⟨10.1109/sies.2016.7509425⟩
SIES
2016 11th IEEE Symposium on Industrial Embedded Systems (SIES), May 2016, Cracovie, Poland. SIES 2016 paper 16, ⟨10.1109/sies.2016.7509425⟩
SIES
International audience; This paper discusses an implementation of runtimeverification for embedded software running on a System-on-Programmable-Chip (SoPC) composed of a microcontroller anda FPGA. The goal is to verify at runtime that the execution o
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::73f0c3219210edc2177d780798978cde
https://hal.archives-ouvertes.fr/hal-01307973/document
https://hal.archives-ouvertes.fr/hal-01307973/document
Publikováno v:
SIES
HAL
11th IEEE International Symposium on Industrial Embedded Systems, IEEE SIES 2016
11th IEEE International Symposium on Industrial Embedded Systems, IEEE SIES 2016, May 2016, Krakow, Poland
HAL
11th IEEE International Symposium on Industrial Embedded Systems, IEEE SIES 2016
11th IEEE International Symposium on Industrial Embedded Systems, IEEE SIES 2016, May 2016, Krakow, Poland
Real-time embedded systems are complex, and as such need to be tested with regards to real-time constraints. However, because of this complexity, some states of the systems can be hard to reach through acting on the input sequence alone, because of s