Zobrazeno 1 - 10
of 23
pro vyhledávání: '"Roy Meade"'
Autor:
Chen Li, David Kehlet, Allen Chan, Chong Zhang, Conor O'Keeffe, Roy Meade, Haiwei Lu, Pavan Bhargava, Mark T. Wade, Chen Sun, Sergey Y. Shumarayev, Tim Tri Hoang, Michael L. Davenport, Erik Anderson, Vladimir Stojanovic, Michael Rust, Forrest Sedgwick, Sidney Buchbinder, Matthew T. Guzy, John M. Fini, Derek Van Orden, Shahab Ardalan, Ravi Mahajan, Chandru Ramamurthy, Tina Tran
Publikováno v:
IEEE Micro. 40:63-71
In this article, we present TeraPHY, a monolithic electronic–photonic chiplet technology for low power and low latency, multi-Tb/s chip-to-chip communications. Integration of the TeraPHY optical technology with open source advanced interconnect bus
Autor:
Chen Sun, Chen Li, Derek Van Orden, Behrooz Beheshtian, Chong Zhang, Pavan Bhargava, Haiwei Lu, Daniel Jeong, Michael Rust, Mason Zhang, Forrest Sedgwick, Woorham Bae, Shahab Ardalan, Chandarasekaran Ramamurthy, Mark T. Wade, Roy Meade, Erik Anderson, Sidney Buchbinder, Austin Katzin, John M. Fini, Anatoly Khilo, Vladimir Stojanovic, Byungchae Kim
Publikováno v:
VLSI Circuits
For the first time, we demonstrate an error-free, 128Gbps (8x16Gbps) optical transceiver using a microring-based wavelength-division multiplexed (WDM) architecture. The optical transceiver ran for 12 hours with zero errors, resulting in a measured bi
Autor:
M. Patel, C. Madden, J. Frey, U. Krishnamoorthy, Michael Rust, Pavan Bhargava, N. Chan, Songtao Liu, R. Roucka, Forrest Sedgwick, Mark T. Wade, H. Eachempatti, Austin Katzin, Erik Anderson, F. Luna, Sidney Buchbinder, Chen Li, D. Van Orden, John M. Fini, M. Sysak, Manan Raval, L. Okada, Mason Zhang, Chandarasekaran Ramamurthy, Shahab Ardalan, Chong Zhang, Anatoly Khilo, Haiwei Lu, R. Zeng, Woorham Bae, Derek M. Kita, K. Robberson, E. Jan, Behrooz Beheshtian, P. Chao, Roy Meade, Daniel Jeong, K. Chang, Vladimir Stojanovic, Byungchae Kim, Chen Sun
Publikováno v:
OFC
We demonstrate 128 Gbps/port (8-λ × 16 Gbps/λ) natively error-free transmission across eight optical ports using a 8-port, 8-λ/port WDM remote laser source and a pair of monolithically integrated CMOS optical I/O chiplets with 4.96-5.56 pJ/bit op
Autor:
Thungoc Tran, Mason Zhang, Chong Zhang, Uma Krishnamoorthy, Haiwei Lu, Mark T. Wade, Chia-Pin Chiu, Kaveh Hosseini, Pavan Bhargava, Li Xiaoqian, Ravi Mahajan, Sergey Y. Shumarayev, Sangeeta Raman, Arnab Sarkar, Edwin Kok, Nitin Deshpande, Asako Toda, Tim Tri Hoang, Conor O'Keeffe, Roy Meade, Vladimir Stojanovic, Kumar Abhishek Singh, Allen Chan, Ke Yanjing, Daniel Jeong, Chen Sun
Publikováno v:
OFC
The first 8 Tbps co-packaged FPGA with Silicon-Photonics IO is presented paving the way for co-packaged compute and optical-IO. The Multi-Chip Package integrates Stratix® 10 FPGA with up to five optical IO chiplets. © 2021 The Author(s).
Autor:
Chong Zhang, Haiwei Lu, Woorham Bae, Mark T. Wade, Forrest Sedgwick, Pavan Bhargava, Erik Anderson, Sidney Buchbinder, Chen Li, Mason Zhang, Derek Van Orden, Vladimir Stojanovic, Shahab Ardalan, Michael Rust, Roy Meade, Behrooz Beheshtian, Chandarasekaran Ramamurthy, Chen Sun, Daniel Jeong, Austin Katzin, John M. Fini, Anatoly Khilo
Publikováno v:
2020 IEEE Symposium on VLSI Technology.
We demonstrate an electro-optic platform enabling a direct optical I/O interface in an ASIC package. The $5.5\mathrm{x}8.9\mathrm{mm}^{2}$ chiplet uses the Advanced Interface Bus (AIB), a parallel digital interface, to communicate to a host ASIC and
Autor:
John M. Fini, Mark T. Wade, Chong Zhang, Chen Sun, Alexandra Wright-Gladstein, Roy Meade, Michael L. Davenport, Shahab Ardalan
Publikováno v:
OFC
In this work, we provide an overview of System-in-Package (SiP) integration of an electronic-photonic chiplet fabricated in a commercial CMOS foundry. Assembly considerations, including co-packaging in a standard multi-chip module (MCM) package with
Autor:
Evelina Yeung, Chen Sun, Pavan Bhargava, Milos A. Popovic, Derek Van Orden, Roy Meade, Vladimir Stojanovic, Rajeev J. Ram, Marc De Cea Falco, Mark T. Wade, Michael L. Davenport, John M. Fini
Publikováno v:
ECOC
We present a high bandwidth-density photonic interconnect platform that transmits 1.05 Tbps/mm2 using 0.83 pJ/bit, integrated in a 45nm SOI process, and a high-density multi-wavelength laser source.
Publikováno v:
VTS
This IP session focuses on introduction of silicon photonics into first level packaging. Silicon photonics is driving heterogenous construction to bring III-V light sources into a silicon modulated and detected environment. Unique test challenges and
Publikováno v:
ECS Transactions. 69:69-84
Device scaling and energy consumption during computation has become a matter of strategic importance for future information technologies. The central question addressed in this talk is: What is the smallest volume of matter needed for a memory elemen
Autor:
Paul Somogyi, Sen Lin, Pavan Bhargava, Mohammad Shahanshah Akhter, Roy Meade, Mark T. Wade, Nandish Mehta, Chen Sun
Publikováno v:
Hot Interconnects
In this work, we present WaveLight, a monolithic silicon-photonics platform whereby a low latency reliable deterministic protocol with optical functions are designed directly into an existing high-volume CMOS process.