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Akademický článek

FPGA implementations of the ICEBERG block cipher

Autor: Standaert, F.-X., Piret, G., Rouvroy, G., Quisquater, J.-J.

Publikováno v: In Integration, the VLSI Journal 2007 40(1):20-27

JPEG-XS - a high-quality mezzanine image codec for video over IP

Autor: Richter, T., Keinert, J., Foessel, S., Descampe, A., Rouvroy, G., Lorent, J.-B.

More and higher quality ultrahigh-definition (UHD) content is arriving in the production environment, requiring additional bandwidth for data transmission and exchange. In parallel, a more flexible infrastructure based on the well-known Internet Prot

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=od_______610::e741dd06add90f9715c3fcdc11af5979
https://publica.fraunhofer.de/handle/publica/256941

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Implementation of the AES-128 on Virtex-5 FPGAs

Autor: Bulens, Philippe, Standaert, François-Xavier, Quisquater, Jean-Jacques, Pellegrin, P., Rouvroy, G., Progress in Cryptology-AFRICACRYPT 2008. First International Conference on Cryptology in Africa

This paper presents an updated implementation of the advanced encryption standard (AES) on the recent Xilinx Virtex-5 FPGAs. We show how a modified slice structure in these reconfigurable hardware devices results in significant improvement of the des

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=od______1493::a235b518b7ff859568f739a7b7dfdf2c
https://hdl.handle.net/2078.1/67674

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ICEBERG : An involutional cipher efficient for block encryption in reconfigurable hardware

Autor: Standaert, François-Xavier, Quisquater, Jean-Jacques, Legat, Jean-Didier, Piret, G., Rouvroy, G., 11th International Workshop on Fast Software Encryption

Publikováno v: Lecture Notes in Computer Science, Vol. 3017, p. 279-298 (2004)

We present a fast involutional block cipher optimized for reconfigurable hardware implementations. ICEBERG uses 64-bit text blocks and 128-bit keys. All components are involutional and allow very efficient combinations of encryption/decryption. Hardw

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=od______1493::497b21605e936e8dab81a9c901cc0572
https://hdl.handle.net/2078.1/61257

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Efficient FPGA implementation of block cipher MISTY1

Autor: Rouvroy, G., Standaert, François-Xavier, Quisquater, Jean-Jacques, Legat, Jean-Didier, International Parallel and Distributed Processing Symposium (IPDPS 2003)

NESSIE is a 3-year research project (2000-2002). The goal of the project is to put forward some algorithms to obtain a set of the next generation of cryptographic primitives. In order to achieve this objective, the project needs to evaluate mathemati

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=od______1493::7f067ef3eb09bcd9c18b407cfc9ce1cc
https://hdl.handle.net/2078.1/68038

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Akademický článek

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Akademický článek

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Conference

FPGA Implementations of the DES and Triple-DES Masked Against Power Analysis Attacks.

Autor: Standaert, F.-X., Rouvroy, G., Quisquater, J.-J.

Publikováno v: 2006 International Conference on Field Programmable Logic & Applications; 2006, p1-4, 4p

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