Zobrazeno 1 - 10
of 39
pro vyhledávání: '"Rosa Rodriguez-Montanes"'
Autor:
Maryam Akbari, Sattar Mirzakuchaki, Daniel Arumi, Salvador Manich, Alvaro Gomez-Pau, Francesca Campabadal, Mireia Bargallo Gonzalez, Rosa Rodriguez-Montanes
Publikováno v:
IEEE Access, Vol 11, Pp 66682-66693 (2023)
Hardware-based security primitives like True Random Number Generators (TRNG) have become a crucial part in protecting data over communication channels. With the growth of internet and cloud storage, TRNGs are required in numerous cryptographic operat
Externí odkaz:
https://doaj.org/article/e68dfd085a36443d89b4b8cde2add0a6
Autor:
Binbin Yang, Daniel Arumi, Salvador Manich, Alvaro Gomez-Pau, Rosa Rodriguez-Montanes, Juan Bautista Roldan, Mireia Bargallo Gonzalez, Francesca Campabadal, Liang Fang
Publikováno v:
UPCommons. Portal del coneixement obert de la UPC
Universitat Politècnica de Catalunya (UPC)
Universitat Politècnica de Catalunya (UPC)
© 2021 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes,creating new c
Autor:
Alvaro Gomez-Pau, Rosa Rodriguez-Montanes, Binbin Yang, Liang Fang, Mireia Bargallo Gonzalez, Francesca Campabadal, Salvador Manich, D. Arumi
Publikováno v:
Electronics
Volume 10
Issue 15
UPCommons. Portal del coneixement obert de la UPC
Universitat Politècnica de Catalunya (UPC)
Electronics, Vol 10, Iss 1842, p 1842 (2021)
Volume 10
Issue 15
UPCommons. Portal del coneixement obert de la UPC
Universitat Politècnica de Catalunya (UPC)
Electronics, Vol 10, Iss 1842, p 1842 (2021)
Non-volatile memory cells are exposed to adversary attacks since any active countermeasure is useless when the device is powered off. In this context, this work proposes the association of two serial RRAM devices as a basic cell to store sensitive da
Autor:
Alvaro Gomez-Pau, Liang Fang, Francesca Campabadal, Salvador Manich, Rosa Rodriguez-Montanes, Binbin Yang, D. Arumi, Mireia Bargallo Gonzalez
Publikováno v:
Electronics
Volume 10
Issue 15
UPCommons. Portal del coneixement obert de la UPC
Universitat Politècnica de Catalunya (UPC)
Electronics, Vol 10, Iss 1831, p 1831 (2021)
Volume 10
Issue 15
UPCommons. Portal del coneixement obert de la UPC
Universitat Politècnica de Catalunya (UPC)
Electronics, Vol 10, Iss 1831, p 1831 (2021)
In this paper, the modulation of the conductance levels of resistive random access memory (RRAM) devices is used for the generation of random numbers by applying a train of RESET pulses. The influence of the pulse amplitude and width on the device re
Autor:
Alvaro Gomez-Pau, Rosa Rodriguez-Montanes, D. Arumi, Francesca Campabadal, Víctor Montilla, Salvador Manich, Mireia Bargallo Gonzalez, David Hernández
Publikováno v:
Electronics, Vol 9, Iss 1, p 200 (2020)
UPCommons. Portal del coneixement obert de la UPC
Universitat Politècnica de Catalunya (UPC)
Recercat. Dipósit de la Recerca de Catalunya
instname
Electronics
Volume 9
Issue 1
UPCommons. Portal del coneixement obert de la UPC
Universitat Politècnica de Catalunya (UPC)
Recercat. Dipósit de la Recerca de Catalunya
instname
Electronics
Volume 9
Issue 1
The ubiquitous use of critical and private data in electronic format requires reliable and secure embedded systems for IoT devices. In this context, RRAMs (Resistive Random Access Memories) arises as a promising alternative to replace current memory
Autor:
Rosa Rodriguez-Montanes, Alvaro Gomez-Pau, Salvador Manich, D. Arumi, Mireia Bargallo Gonzalez, Francesca Campabadal
Publikováno v:
UPCommons. Portal del coneixement obert de la UPC
Universitat Politècnica de Catalunya (UPC)
Universitat Politècnica de Catalunya (UPC)
In this letter, the serial configuration of two RRAMs is used as a basic cell to generate an unpredictable bit. The basis of the operation considers starting from the Low Resistive State (LRS) in both devices (initialization step), then, one of them
Publikováno v:
UPCommons. Portal del coneixement obert de la UPC
Universitat Politècnica de Catalunya (UPC)
Recercat. Dipósit de la Recerca de Catalunya
instname
Universitat Politècnica de Catalunya (UPC)
Recercat. Dipósit de la Recerca de Catalunya
instname
Through-silicon vias (TSVs) are critical elements in 3-D integrated circuits susceptible to defects during fabrication and lifetime. It is desirable to detect defective TSVs in the early steps of the fabrication process to prevent stacking yield loss
Autor:
Alvaro Gomez-Pau, D. Arumi, Mireia Bargallo Gonzalez, Salvador Manich, Rosa Rodriguez-Montanes, Francesca Campabadal
Publikováno v:
UPCommons. Portal del coneixement obert de la UPC
Universitat Politècnica de Catalunya (UPC)
Digital.CSIC. Repositorio Institucional del CSIC
instname
Recercat. Dipósit de la Recerca de Catalunya
Universitat Politècnica de Catalunya (UPC)
Digital.CSIC. Repositorio Institucional del CSIC
instname
Recercat. Dipósit de la Recerca de Catalunya
In this letter, a cell with the parallel combination of two TiN/Ti/HfO/W resistive random access memory (RRAM) devices is studied for the generation of unpredictable bits. Measurements confirm that a simultaneous parallel SET operation in which one o
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::177ca96bce142742350ba690d663acc1
https://hdl.handle.net/2117/127528
https://hdl.handle.net/2117/127528
Publikováno v:
Recercat. Dipósit de la Recerca de Catalunya
instname
UPCommons. Portal del coneixement obert de la UPC
Universitat Politècnica de Catalunya (UPC)
instname
UPCommons. Portal del coneixement obert de la UPC
Universitat Politècnica de Catalunya (UPC)
© 20xx IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting /republishing this material for advertising or promotional purposes, creating new
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::efd6f3d93ba3484427374fbb8c083d3a
https://publica.fraunhofer.de/handle/publica/253387
https://publica.fraunhofer.de/handle/publica/253387
Publikováno v:
ETS
22nd IEEE European Test Symposium
ETS: European Test Symposium
ETS: European Test Symposium, May 2017, Limassol, Cyprus. ⟨10.1109/ETS.2017.7968209⟩
22nd IEEE European Test Symposium
ETS: European Test Symposium
ETS: European Test Symposium, May 2017, Limassol, Cyprus. ⟨10.1109/ETS.2017.7968209⟩
International audience; In this paper we propose a methodology for reliability evaluation, failure prediction, and failure mitigation of a STT-MRAM memory under different supply voltage conditions (i.e., DVS scenarios). The methodology is based on th