Zobrazeno 1 - 10
of 10
pro vyhledávání: '"Rolf Lagerquist"'
Autor:
Ashish Nayak, HsinChen Chen, Hugh Mair, Rolf Lagerquist, Tao Chen, Anand Rajagopalan, Gordon Gammie, Ramu Madhavaram, Madhur Jagota, CJ Chung, Jenny Wiedemeier, Bala Meera, Chao-Yang Yeh, Maverick Lin, Curtis Lin, Vincent Lin, Jiun Lin, YS Chen, Barry Chen, Cheng-Yuh Wu, Ryan ChangChien, Ray Tzeng, Kelvin Yang, Achuta Thippana, Ericbill Wang, SA Hwang
Publikováno v:
2022 IEEE International Solid- State Circuits Conference (ISSCC).
Autor:
Jason Tsai, Manzur Rahman, Lee-Kee Yong, Rolf Lagerquist, Henry Hsieh, Vincent Lin, Sa Huang, Sudhakar Maruthi, Elly Chiang, Wade Wu, Ericbill Wang, Hsinchen Chen, Ashish Nayak, Anand Rajagopalan, Tao Chen, Gordon Gammie, Curtis Lin, Cheng-Yuh Wu, Hugh Mair, Ramu Madhavaram, Gokulakrishnan Manoharan, Amjad Sikiligiri, Daniel Dia, Efron Ho, Jenny Wiedemeier, Barry Chen, Achuta Thippana, Madhur Jagota, Chi-Jui Chung, Po-Yang Hsu
Publikováno v:
ISSCC
This paper describes a new CPU subsystem featured in a 5G mobile SoC. The High-Performance (HP) core achieves a 3GHz clock frequency with full production yield across the fabrication range and operating environment. In contrast to previously publishe
Autor:
Rolf Lagerquist, Blundt Li, Ericbill Wang, Jenny Wiedemeier, Hsinchen Chen, Rory Huang, Lee-Kee Yong, Manzur Rahman, Vincent Lin, Sa Huang, Ashish Nayak, Achuta Thippana, Hugh Mair, Loda Chou, Michael Yanq, Ramu Madhavaram, Osric Su, Gordon Gammie, Alex Chiou
Publikováno v:
ISSCC
This paper introduces the heterogenous CPU complex of a fully integrated 5G mobile Smartphone SoC, implemented in 7nm FinFET technology. Circuit techniques developed to achieve competitive CPU PPA are detailed, and associated silicon results are pres
Autor:
Ray Tzeng, Cheng-Yuh Wu, Taner Dosluoglu, Chi-Hsueh Wang, Jin Son, David Yen, Hugh Mair, Girishankar Gurumurthy, Yi-Chang Zhuang, Wuan Kuo, Yuwen Tsai, Hung-Wei Wang, Ue Fu, Rolf Lagerquist, Kent Li, Achuta Thippana, Sumanth Gururajarao, Tony Hsieh, Ping Kao, Alice Wang, Mark Shane Peng, Gordon Lin, Jengding Wu, Anatoly Gelman, Daniel Dia, Lin Wen-Yi, Uming Ko, Gordon Gammie, Manzur Rahman, Ericbill Wang
Publikováno v:
ISSCC
This paper describes logic and circuit design features of a heterogeneous tri-cluster deca-core CPU complex incorporated into a 10nm FinFET mobile SoC for smartphone applications. Similar to Helio X20 [1], the Deca-Core compute function contains thre
Autor:
Amit Jain, Gordon Gammie, Jengding Wu, Hugh Mair, Shichin Ouyang, Leo Shieh, Minh Chau, Vincent Lin, Lee-Kee Yong, Achuta Thippana, Wuan Kuo, Ue Fu, Anirban Saha, Anshul Varma, Hsinchen Chen, Clavin Peng, Anand Rajagopalan, Ping Kao, Huajun Wen, Alfred Tsai, Brian Flachs, Syed Rahman, Rolf Lagerquist, Ericbill Wang, Uming Ko, Alice Wang, Mark Shane Peng, Chi-Jui Chung, Sumanth Gururajarao
Publikováno v:
ISSCC
This paper describes design features of the high-performance CPU from a heterogeneous tri-cluster, deca-core CPU subsystem incorporated into the Helio X20 mobile SoC for smartphone applications. The SoC is fabricated in a 20nm high-κ metal-gate CMOS
Autor:
Philippe Royannez, Gordon Gammie, Hugh Mair, Rolf Lagerquist, S. Gururajarao, Minh Chau, Alice Wang, Uming Ko
Publikováno v:
Proceedings of the IEEE. 98:144-159
In the last couple of decades, handheld wireless devices such as cell phones have become one of the most prolific electronic devices in history. With this has come an exploding demand for performance and features that cover almost every aspect of our
Autor:
Minh Chau, Anand Rajagopalan, Gordon Gammie, Kent Li, Lee-Kee Wong, Sumanth Gururajarao, Yijing Liu, Jidong Wang, Uming Ko, Hsinchen Chen, Wuan Kuo, Wei-Zheng Ge, Daniel Dia, Ichiro Lin, Alice Wang, Mark Shane Peng, Chi-Jui Chung, Hugh Mair, Rolf Lagerquist, Yi-Chang Zhuang, Syed Rahman, Simon Wang
Publikováno v:
ISSCC
This paper describes the high-performance CPU design of a heterogeneous octa-core CPU complex, incorporated into a highly integrated mobile SoC for smartphone applications. The SoC is fabricated in a 28nm high-x metal-gate CMOS, and has a die size of
Autor:
Sheng-Ping Chen, Chih-Chieh Yang, You-Ming Tsao, Yeh-Chi Chou, Gordon Gammie, Meng-Nan Tsou, Shu-Hsin Chang, Wuan Kuo, Kin Hooi Dia, Jidong Wang, Uming Ko, Jim C. Tai, Rolf Lagerquist, Tsung-Yao Lin, Alice Wang, Ming-Hsien Lee, Wei-Hung Huang, Lee-Kee Yong, Koan-Sin Tan, Shih-Hung Lin, Chia-Wei Wang, Shichin Ouyang, Chun-Hsiung Hu, Chih-Cheng Chen, Cheng-Hsing Chien, Chi-Jui Chung, Chi-Wei Yang, Nitin Kumar Singh
Publikováno v:
ISSCC
Driven by consumer demand, mobile devices such as smartphones and tablets are offering more desktop-like capabilities. High-performance CPUs and GPUs, which handle compute-intensive tasks, are key to enhancing the user experience in applications such
Autor:
Gordon Gammie, Philippe Royannez, D. Wilson, Franck Dahan, Alice Wang, A. Sadate, Norman L. Culp, David B. Scott, S. Gururajarao, Rolf Lagerquist, L. Ho, James Sangwon Song, Hugh Mair, Minh Chau, Uming U. Ko, B. Carlson, M. Basude
Publikováno v:
2007 IEEE Symposium on VLSI Circuits.
In this paper we present the SmartReflextrade power management techniques implemented on the OMAP3430 Mobile Multimedia Applications Processor. By using multiple voltage domains, fine grain power domains, split-rail memories, and adaptive compensatio
Autor:
Rolf Lagerquist, C. Raibaut, Hugh Mair, J. L. Lachese, L. Bouetel, J. Ciroux, F. Piacibello, F. Ben-Amar, Vinod Menezes, F. Jumel, David B. Scott, J. Rosal, Sudha Thiruvengadam, Philippe Royannez, Norman L. Culp, A.E. Rachidi, S. Gururajarao, Michael Patrick Clinton, J. Vaccani, O. Domerego, M. Ball, Uming U. Ko, Minh Chau, R. Hollingsworth, C. Foumet-Fayard
Publikováno v:
2007 IEEE International Conference on Integrated Circuit Design and Technology.
Leakage power management, wireless SoC In this paper we present a leakage management system which takes advantage of the existing clock gating infrastructure. This methodology avoids both RTL and software changes, at the block and chip level. We illu