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pro vyhledávání: '"Roland Bakalski"'
Autor:
Dennis M. Fischette, Anand Thiruvengadam, Bruce A. Doyle, Alvin Leng Sun Loke, Roland Bakalski, Emerson S. Fang, Michael M. Oshima, Charles L. Wang, Gerry R. Talbot, Richard J. Desantis
Publikováno v:
ISSCC
As processors emerge with multiple wireline interfaces for high-performance digital media, a common multi-protocol clock system is essential for cost and power reduction. We present a 45nm SOI-CMOS system that clocks an 8-lane processor I/O designed
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b79880167e6816f33dc3169503aa8b22
https://doi.org/10.1109/isscc.2010.5433942
https://doi.org/10.1109/isscc.2010.5433942
