Zobrazeno 1 - 10
of 17
pro vyhledávání: '"Roberto Giorgio Rizzo"'
Publikováno v:
Journal of Low Power Electronics and Applications, Vol 10, Iss 1, p 10 (2020)
Embedded Convolutional Neural Networks (ConvNets) are driving the evolution of ubiquitous systems that can sense and understand the environment autonomously. Due to their high complexity, aggressive compression is needed to meet the specifications of
Externí odkaz:
https://doaj.org/article/652dd0bad82f4e0b8db933bfea5c09eb
Autor:
Roberto Giorgio Rizzo, Andrea Calimera
Publikováno v:
Journal of Low Power Electronics and Applications, Vol 9, Iss 2, p 17 (2019)
Adaptive Voltage Over-Scaling can be applied at run-time to reach the best tradeoff between quality of results and energy consumption. This strategy encompasses the concept of timing speculation through some level of approximation. How and on which p
Externí odkaz:
https://doaj.org/article/fb3e821abb0449d38fb7b25f7c1150dc
Publikováno v:
VLSI-SoC
Convolutional Neural Networks (ConvNets) are trained offline using the few available data and may therefore suffer from substantial accuracy loss when ported on the field, where unseen input patterns received under unpredictable external conditions c
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::7fedd650a5065c12ba82373607e704d2
http://hdl.handle.net/11583/2947632
http://hdl.handle.net/11583/2947632
This brief introduces Topology Voltage Frequency Scaling (TVFS), a performance management technique for embedded Convolutional Neural Networks (ConvNets) deployed on low-power CPUs. Using TVFS, pre-trained ConvNets can be efficiently processed over a
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::ead3fca26fb93048651cf631ab97e119
http://hdl.handle.net/11583/2851354
http://hdl.handle.net/11583/2851354
Publikováno v:
SNAMS
The portability of Convolutional Neural Networks (ConvNets) on the mobile edge of the Internet has proven extremely challenging. Embedded CPUs commonly adopted on portable devices were designed and optimized for different kinds of applications, hence
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::6eb5b96f6ad270ac739b06408126e5c7
https://doi.org/10.1109/snams.2019.8931889
https://doi.org/10.1109/snams.2019.8931889
Autor:
Andrea Calimera, Anupam Chattopadhyay, Roberto Giorgio Rizzo, Debjyoti Bhattacharjee, Valerio Tenace
Publikováno v:
DATE
A Memristor is a two-terminal device that can serve as a non-volatile memory element with built-in logic capabilities. Arranged in a crossbar structure, memristive arrays allow to represent complex Boolean logic functions that adhere to the logic-in-
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::0f95e5ce7ea72246e3c7b189fc28ef61
https://doi.org/10.23919/date.2019.8714939
https://doi.org/10.23919/date.2019.8714939
Publikováno v:
Electronics
Volume 8
Issue 12
Volume 8
Issue 12
Convolutional Neural Networks (ConvNets) can be shrunk to fit embedded CPUs adopted on mobile end-nodes, like smartphones or drones. The deployment onto such devices encompasses several algorithmic level optimizations, e.g., topology restructuring, p
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::f8dff8739c5ce9550048236bcea6af44
http://hdl.handle.net/11583/2770677
http://hdl.handle.net/11583/2770677
Publikováno v:
IFIP Advances in Information and Communication Technology
25th IFIP/IEEE International Conference on Very Large Scale Integration-System on a Chip (VLSI-SoC)
25th IFIP/IEEE International Conference on Very Large Scale Integration-System on a Chip (VLSI-SoC), Oct 2017, Abu Dhabi, United Arab Emirates. pp.153-177, ⟨10.1007/978-3-030-15663-3_8⟩
VLSI-SoC: Opportunities and Challenges Beyond the Internet of Things ISBN: 9783030156626
VLSI-SoC (Selected Papers)
25th IFIP/IEEE International Conference on Very Large Scale Integration-System on a Chip (VLSI-SoC)
25th IFIP/IEEE International Conference on Very Large Scale Integration-System on a Chip (VLSI-SoC), Oct 2017, Abu Dhabi, United Arab Emirates. pp.153-177, ⟨10.1007/978-3-030-15663-3_8⟩
VLSI-SoC: Opportunities and Challenges Beyond the Internet of Things ISBN: 9783030156626
VLSI-SoC (Selected Papers)
International audience; An efficient implementation of voltage over-scaling policies for ultra-low power ICs passes through the design of on-chip Error Detection and Correction (EDC) mechanisms that can provide continuous feedback about the health of
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::97121b0d342eb1628b5780ce442e8733
http://hdl.handle.net/11583/2736378
http://hdl.handle.net/11583/2736378
Publikováno v:
Integration. 70:159
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9c7a9d2c91933bf994f12c648a187e16
https://doi.org/10.1016/j.vlsi.2019.11.011
https://doi.org/10.1016/j.vlsi.2019.11.011
Publikováno v:
ISCAS
Inspired by cognitive functions of the human brain, machine learning-driven synthesis flows can map Boolean functions as Classification Trees that work like statistical inference engines. Circuits of this kind infer output values by evaluating the ke
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::9b32f5b2f4b8948c6a609d676bc80642
https://doi.org/10.1109/iscas.2018.8351206
https://doi.org/10.1109/iscas.2018.8351206