Zobrazeno 1 - 10
of 29
pro vyhledávání: '"Robert W. Murto"'
Autor:
Peter Zeitzoff, Gennadi Bersuker, Chadwin D. Young, Jang H. Sim, George A. Brown, Rino Choi, Byoung Hun Lee, Robert W. Murto
Publikováno v:
Microelectronics Reliability. 44:1509-1512
Response of the high-k gate dielectrics to low voltage stresses was studied by probing high-k transistors with various voltage/time measurements at different temperatures. The observed dependence of the transistor threshold voltage on stress time was
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b49cfc16243cf2d74d9c3926fd199b8c
https://doi.org/10.1016/j.microrel.2004.07.048
https://doi.org/10.1016/j.microrel.2004.07.048
Autor:
C. Lim, Howard R. Huff, Mark Gardner, Chadwin D. Young, A. Hou, Peter Zeitzoff, Y. Kim, Patrick S. Lysaght, J. Gutt, Joel Barnett, Gennadi Bersuker, George A. Brown, Robert W. Murto
Publikováno v:
Microelectronic Engineering. 69:152-167
The gate stack should be regarded as a multi-element interfacial layered structure wherein the high-k gate dielectric and gate electrodes (and their corresponding interfaces) must be successfully comprehended. The surface clean and subsequent surface
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2dea9f41d1f32449ee7b8e8316a3e34a
https://doi.org/10.1016/s0167-9317(03)00292-2
https://doi.org/10.1016/s0167-9317(03)00292-2
Publikováno v:
Journal of Non-Crystalline Solids. 303:54-63
High-k dielectric materials including zirconium oxide and hafnium oxide produced by atomic layer deposition have been evaluated for thermal stability. As-deposited samples have been compared with rapid thermal annealed samples over a range of source/
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::517ed5765551d25c749c67be7bda2cfc
https://doi.org/10.1016/s0022-3093(02)00964-x
https://doi.org/10.1016/s0022-3093(02)00964-x
Autor:
Howard R. Huff, Patrick S. Lysaght, Gennadi Bersuker, Brendan Foran, Peijun J. Chen, Robert W. Murto
Publikováno v:
Applied Physics Letters. 82:1266-1268
Changes in the composition of atomic layer deposited, uncapped hafnium dioxide films, as a function of anneal temperature, have been evaluated by several advanced analytical techniques including; x-ray reflectivity, high-resolution transmission elect
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8a1207bc278532eda61362829caf7288
https://doi.org/10.1063/1.1553998
https://doi.org/10.1063/1.1553998
Autor:
A. Karamcheti, Husam N. Alshareef, Philip Allan Kraus, M.D. Jackson, George A. Brown, Robert W. Murto, Gennadi Bersuker, Christopher S. Olsen, Gary E. Miner, Howard R. Huff, D. Lopes, T. Y. Luo
Publikováno v:
Applied Physics Letters. 78:3875-3877
In situ steam generated (ISSG) oxides have recently attracted interest for use as gate dielectrics because of their demonstrated reliability improvement over oxides formed by dry oxidation. [G. Minor, G. Xing, H. S. Joo, E. Sanchez, Y. Yokota, C. Che
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6753f47ff6d005bc3046367d17430589
https://doi.org/10.1063/1.1379363
https://doi.org/10.1063/1.1379363
Autor:
Jeff J. Peterson, Y. Kim, Nirmal Chaudhary, Chadwin D. Young, Gennadi Bersuker, Byoung Hun Lee, Peter Zeitzoff, G.A.J.H. Sim, M. Gardner, J. Gutt, George A. Brown, Sundararaman Gopalan, Joel Barnett, H.-J. Li, P. Lysaght, Howard R. Huff, Naim Moumen, Robert W. Murto
Publikováno v:
Scopus-Elsevier
Electrical properties of a wide range of Hf-based gate stacks were investigated using several modifications of a standard planar CMOS process flow to address the effects of transistor processing on the electrical properties of the high-k dielectrics.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::643332175d8e90cc486dd527313fcd9c
https://doi.org/10.1109/relphy.2004.1315375
https://doi.org/10.1109/relphy.2004.1315375
Autor:
L. Larson, Peter Zeitzoff, C. Metzner, Chadwin D. Young, S. Kher, A. Agarwal, Mark Gardner, Howard R. Huff, Robert W. Murto, C. Lim, Y. Kim, Brendan Foran, Gennadi Bersuker, George A. Brown, Joel Barnett, Ken Matthews
Publikováno v:
2003 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.03CH37407).
Conventional poly-Si gate MOS transistors with a high-k gate-dielectric were fabricated using a novel, ultra-thin Hf-oxide. Various integration effects on the high-k layer were studied such as Si-surface preparation, deposition conditions, and post-d
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::12d03c95ba4fabbe44ce4f4b990cfa0e
https://doi.org/10.1109/vlsit.2003.1221138
https://doi.org/10.1109/vlsit.2003.1221138
Publikováno v:
2000 International Conference on Ion Implantation Technology Proceedings. Ion Implantation Technology - 2000 (Cat. No.00EX432).
In order to investigate the role of the end of range damage on dopant motion during post-laser thermal processing (LTP) anneals, a 15 keV, 1/spl times/10/sup 15/ ions/cm/sup 2/ Si/sup +/ implant was used to amorphize the silicon surface. Low energy i
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::151be5c2ade210a682680585ba5fee7a
https://doi.org/10.1109/iit.2000.924103
https://doi.org/10.1109/iit.2000.924103
Autor:
Howard R. Huff, P.S. Lyaaght, L. Larson, Robert W. Murto, Gennadi Bersuker, Brendan Foran, Robin Tichy
Publikováno v:
10th IEEE International Conference of Advanced Thermal Processing of Semiconductors.
As complimentary metal oxide semiconductor (CMOS) devices continue to scale with the rapid performance pace of Moore's Law, gate dielectric materials with significantly higher dielectric constants (k=10-25) are being investigated as potential replace
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::09b0cb376aa6a7dffb2480192d17ec03
https://doi.org/10.1109/rtp.2002.1039445
https://doi.org/10.1109/rtp.2002.1039445
Autor:
S. Borthakur, Husam N. Alshareef, R. Bergmann, L. Larson, A. Hou, D.J. Derro, A. Agarwal, Howard R. Huff, F. Shaapur, Robert W. Murto, George A. Brown, Billy Nguyen, Mark Gardner, P. Lysaght, Chris M. Sparks, Gennadi Bersuker, Deborah J. Riley, Loyd Perrymore, C. Lim, Kenneth Torres, Peter Zeitzoff, M. Freiler, S. Lim, Y. Kim, G. Gebara, Brendan Foran, Chadwin D. Young, J.E. Lim, M.D. Jackson, B. Bowers, J. Gutt, Joel Barnett, P.J. Chen
Publikováno v:
Extended Abstracts of International Workshop on Gate Insulator. IWGI 2001 (IEEE Cat. No.01EX537).
We review several gate stack fabrication issues critical for robust, commercially viable tools, including assessment of possible fab contamination due to the higher-k gate dielectrics and the role of subsequent thermal procedures during, for example,
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1993d901660b8c2c543da639dd6375a5
https://doi.org/10.1109/iwgi.2001.967538
https://doi.org/10.1109/iwgi.2001.967538