Zobrazeno 1 - 10
of 55
pro vyhledávání: '"Robert N. M. Watson"'
Autor:
Richard Grisenthwaite, Graeme Barnes, Robert N. M. Watson, Simon W. Moore, Peter Sewell, Jonathan Woodruff
Publikováno v:
IEEE Micro. 43:50-57
Autor:
Robert N. M. Watson, Graeme Barnes, Jessica Clarke, Richard Grisenthwaite, Peter Sewell, Simon W. Moore, Jonathan Woodruff
Arm’s Morello prototype incorporates a first-generation CHERI-enabled Armv8-A CPU prototype. We have developed Morello to enable CHERI-based research by a growing community of researchers seeking access to potentially transformative architectural s
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2a55aaa14e48015cb740fb3ae1a71437
Autor:
Alexandre Joannou, Peter Rugg, Jonathan Woodruff, Franz A. Fuchs, Marno Van der Maas, Matthew Naylor, Michael Roe, Robert N. M. Watson, Peter G. Neumann, Simon W. Moore
Publikováno v:
IEEE Design & Test. :1-1
TestRIG (Testing with Random Instruction Generation) is a testing framework for RISC-V implementations. The RISC-V community has standardized a formal model of the architecture in the Sail language, giving a human-readable specification that can also
Autor:
Reto Achermann, Alexander Richardson, Paolo Faraboschi, Lukas Humbel, Dejan Milojicic, Timothy Roscoe, Moritz Hoffmann, Leonid Azriel, Robert N. M. Watson, Avi Mendelson
Publikováno v:
ACM Transactions on Architecture and Code Optimization. 16:1-26
Byte-addressable nonvolatile memory (NVM) blends the concepts of storage and memory and can radically improve data-centric applications, from in-memory databases to graph processing. By enabling large-capacity devices to be shared across multiple com
Autor:
Paolo Faraboschi, Timothy Roscoe, Dejan Milojicic, Robert N. M. Watson, Kirk Bresniker, Avi Mendelson
Publikováno v:
Computer. 52:52-62
Rack-scale systems with large, shared, disaggregated, and persistent memory need solid protection and authorization techniques. Our solution uses a memoryside capability enforcement processor that gates memory accesses through extended capabilities,
Autor:
Thomas Bauereiss, Brian Campbell, Thomas Sewell, Alasdair Armstrong, Lawrence Esswood, Ian Stark, Graeme Barnes, Robert N. M. Watson, Peter Sewell
Publikováno v:
Programming Languages and Systems ISBN: 9783030993351
Bauereiss, T, Campbell, B, Sewell, T, Armstrong, A, Esswood, L, Stark, I, Barnes, G, Watson, R N M & Sewell, P 2022, Verified Security for the Morello Capability-enhanced Prototype Arm Architecture . in I Sergey (ed.), Programming Languages and Systems-31st European Symposium on Programming, ESOP 2022, Held as Part of the European Joint Conferences on Theory and Practice of Software, ETAPS 2022, Munich, Germany, April 2–7, 2022, Proceedings . Lecture Notes in Computer Science, vol. 13240, pp. 174-203, 31st European Symposium on Programming, Munich, Bavaria, Germany, 2/04/22 . https://doi.org/10.1007/978-3-030-99336-8_7
Lecture Notes in Computer Science
Lecture Notes in Computer Science-Programming Languages and Systems
Bauereiss, T, Campbell, B, Sewell, T, Armstrong, A, Esswood, L, Stark, I, Barnes, G, Watson, R N M & Sewell, P 2022, Verified Security for the Morello Capability-enhanced Prototype Arm Architecture . in I Sergey (ed.), Programming Languages and Systems-31st European Symposium on Programming, ESOP 2022, Held as Part of the European Joint Conferences on Theory and Practice of Software, ETAPS 2022, Munich, Germany, April 2–7, 2022, Proceedings . Lecture Notes in Computer Science, vol. 13240, pp. 174-203, 31st European Symposium on Programming, Munich, Bavaria, Germany, 2/04/22 . https://doi.org/10.1007/978-3-030-99336-8_7
Lecture Notes in Computer Science
Lecture Notes in Computer Science-Programming Languages and Systems
Memory safety bugs continue to be a major source of security vulnerabilities in our critical infrastructure. The CHERI project has proposed extending conventional architectures with hardware-supported capabilities to enable fine-grained memory protec
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::e33b27cf5d89ec8d861535ebdebf90f8
Autor:
John Baldwin, Simon W. Moore, A. Theodore Markettos, Peter G. Neumann, Robert N. M. Watson, Ruslan Bukin
Publikováno v:
HASP@MICRO
We propose new solutions that can efficiently address the problem of malicious memory access from pluggable computer peripherals and microcontrollers embedded within a system-on-chip. This problem represents a serious emerging threat to total-system
Autor:
Alexander Richardson, Alastair R. Beresford, Jessica Clarke, Robert N. M. Watson, Michael Dodson
Publikováno v:
EuroS&P Workshops
Cyber-Physical Systems (CPS) often rely on network boundary defence as a primary means of access control; therefore, the compromise of one device threatens the security of all devices within the boundary. Resource and real-time constraints, tight har
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::69ff627bcf1e532f97c3330a46ad58a8
Autor:
Peter Sewell, Khilan Gudka, David Chisnall, Alexander Richardson, Robert N. M. Watson, Alexandre Joannou, Stacey Son, John Baldwin, Edward Napierala, Michael Roe, Robert M. Norton, Nathaniel Wesley Filardo, Alfredo Mazzinghi, Simon W. Moore, Jessica Clarke, Jonathan Woodruff, Sam Ainsworth, Brooks Davis, Brett F. Gutstein, Peter G. Neumann, Lucian Paul-Trifu, A. Theodore Markettos, Hongyan Xia, Timothy M. Jones
Publikováno v:
Proceedings of the 41st IEEE Symposium on Security and Privacy (SP)
2020 IEEE Symposium on Security and Privacy (SP)
IEEE Symposium on Security and Privacy
2020 IEEE Symposium on Security and Privacy (SP)
IEEE Symposium on Security and Privacy
Use-after-free violations of temporal memory safety continue to plague software systems, underpinning many high-impact exploits. The CHERI capability system shows great promise in achieving C and C++ language spatial memory safety, preventing out-of-
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::aca2234b627b684664fc034652d5b50c
Autor:
Robert N. M. Watson, Peter G. Neumann, Jonathan Woodruff, Michael Roe, Hesham Almatary, Jonathan Anderson, John Baldwin, Graeme Barnes, David Chisnall, Jessica Clarke, Brooks Davis, Lee Eisen, Nathaniel Wesley Filardo, Richard Grisenthwaite, Alexandre Joannou, Ben Laurie, A. Theodore Markettos, Simon W. Moore, Steven J. Murdoch, Kyndylan Nienhuis, Robert Norton, Alexander Richardson, Peter Rugg, Peter Sewell, Stacey Son, Hongyan Xia
This technical report describes CHERI ISAv8, the eighth version of the CHERI architecture being developed by SRI International and the University of Cambridge. This design captures ten years of research, development, experimentation, refinement, form
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1f5b2e44e3ab9cca15f234ee537f453d