Zobrazeno 1 - 7
of 7
pro vyhledávání: '"Robert L. Sankman"'
Autor:
Sriram R. Vangal, Tao Wang, Turbo Majumder, Somnath Paul, Robert L. Sankman, Debendra Mallik, James W. Tschanz, Vaughn J. Grossnickle, Paolo Aseron, Ryan Gary Kim, Vinayak Honkote, Vivek De
Publikováno v:
IEEE Journal of Solid-State Circuits. 52:961-971
An energy-harvesting wireless sensor node (WSN) integrates a 14-nm, 0.79-mm2, 32-b Intel Architecture core-based near-threshold voltage (NTV) microcontroller (MCU) that provides 17- $\mu \text{W}$ /MHz always-ON, always-sensing (AOAS) capability. The
Autor:
Ravi Mahajan, Zhiguo Qian, Robert L. Sankman, Ashish Dhall, Debendra Mallik, Rosch Jonathan, Islam A. Salama, Kemal Aygun
Publikováno v:
Advances in Embedded and Fan-Out Wafer-Level Packaging Technologies
This chapter presents comparisons between planar architectures that use silicon back‐end wiring technologies that essentially represent the upper end of the I/O/mm/layer spectrum and offer silicon‐level connectivity on package. Embedded multi‐d
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::29e035358939cbd2a1b6abfb86d24ed9
https://doi.org/10.1002/9781119313991.ch23
https://doi.org/10.1002/9781119313991.ch23
Autor:
Somnath Paul, Robert L. Sankman, Ryan Kim, Paolo Aseron, Debendra Mallik, Turbo Majumder, James W. Tschanz, Sandeep K. Jain, Sriram R. Vangal, Vivek De, Vinayak Honkote, Vaughn J. Grossnickle
Publikováno v:
VLSI Circuits
A wireless sensor node (WSN) integrates a 0.79mm2 near-threshold voltage (NTV) 32-bit Intel Architecture (IA) microcontroller (MCU) in 14nm tri-gate CMOS, along with solar cell, energy harvester, flash memory, sensors and Bluetooth Low Energy (BLE) r
Autor:
Robert L. Sankman, Yidnekachew S. Mekonnen, Kemal Aygun, Sujit Sharan, Islam A. Salama, Ravi Mahajan, Neha M. Patel, Deepti Iyengar, Dae-Woo Kim, Debendra Mallik, Zhi-Guo Qian
Publikováno v:
2016 IEEE 66th Electronic Components and Technology Conference (ECTC).
The EMIB dense MCP technology is a new packaging paradigm that provides localized high density interconnects between two or more die on an organic package substrate, opening up new opportunities for heterogeneous on-package integration. This paper pr
Autor:
Chia-Pin Chiu, J. He, Ravindranath V. Mahajan, Debendra Mallik, Kaladhar Radhakrishnan, Robert L. Sankman
Publikováno v:
CICC
The role of semiconductor packaging has evolved from space transformation and environmental protection, to becoming an important enabler for silicon and system performance. This paper will examine some of the advances in flip-chip packaging as an ena
Publikováno v:
2000 Proceedings. 50th Electronic Components and Technology Conference (Cat. No.00CH37070).
This paper describes the architecture and design of an Organic Land Grid Array (OLGA) and a Flip Chip Pin Grid Array (FCPGA) package for a 32 bit microprocessor with a clock frequency of 1 GHz and an I/O bus designed to run at 133 MHz. Cost and perfo
Conference
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