Zobrazeno 1 - 10
of 21
pro vyhledávání: '"Rita Fung"'
Autor:
Zongru Li, Christopher Elash, Chen Jin, Li Chen, Shi-Jie Wen, Rita Fung, Jiesi Xing, Shuting Shi, Zhi Wu Yang, Bharat L. Bhuva
Publikováno v:
IEEE Transactions on Nuclear Science. 70:596-602
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e2478c885b3bda684a94f3e4db0fcffe
https://doi.org/10.1109/tns.2023.3257744
https://doi.org/10.1109/tns.2023.3257744
Publikováno v:
IEEE Transactions on Device and Materials Reliability. 22:194-204
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4ece669c7066056bbd55dadd8ca4512f
https://doi.org/10.1109/tdmr.2022.3156807
https://doi.org/10.1109/tdmr.2022.3156807
Publikováno v:
IEEE Transactions on Device and Materials Reliability. 20:74-83
A 65 mn test chip to study electromigration (EM) events in integrated circuit power grids was taped-out and successfully tested. A $9\times 9$ grid was implemented using M3 and M4 metal layers which was stressed under constant current and constant vo
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ef95696bc1f551677b4e699f37b5f53e
https://doi.org/10.1109/tdmr.2019.2956158
https://doi.org/10.1109/tdmr.2019.2956158
Autor:
Christopher J. Elash, Zongru Li, Chen Jin, Li Chen, Shi-Jie Wen, Rita Fung, Jiesi Xing, Shuting Shi, Zhi Wu Yang, Bharat L. Bhuva
Publikováno v:
IEEE Transactions on Nuclear Science. :1-1
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ca4e54da4863e5529c4c6ac656d5e283
https://doi.org/10.1109/tns.2023.3263770
https://doi.org/10.1109/tns.2023.3263770
Publikováno v:
IEEE Transactions on Device and Materials Reliability. 19:591-601
This study analyzes the Electrostatic Discharge (ESD) susceptibility of a 28 nm high-speed CMOS Integrated Circuit (IC) for network applications (25 Gbps), showing a non-negligible failure rate in manufacturing after having passed Charged Device Mode
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::bfd44252d4fccffe462a20a053d53515
https://doi.org/10.1109/tdmr.2019.2952286
https://doi.org/10.1109/tdmr.2019.2952286
Publikováno v:
Electronics; Volume 12; Issue 1; Pages: 32
High-bandwidth memory 2 (HBM2) vertically stacks multiple dynamic random-access memory (DRAM) dies to achieve a small form factor and high capacity. However, it is difficult to diagnose HBM2 issues owing to their structural complexity and 2.5D integr
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::93e85847261baa01f8029f49a5806103
https://doi.org/10.3390/electronics12010032
https://doi.org/10.3390/electronics12010032
Autor:
Jared M Anderson, Shi-Jie Wen, Rita Fung, Andrew M. Keller, Michael Wirthlin, Conner Chambers
Publikováno v:
IRPS
Duplication with compare, a circuit-level fault-detection technique, is used in this study in a partial manner to detect radiation-induced failures in a commercial FPGA-based networking system. A novel approach is taken to overcome challenges present
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::48ca3775f63943fcef95d61f5bce5108
https://doi.org/10.1109/irps45951.2020.9128839
https://doi.org/10.1109/irps45951.2020.9128839
Publikováno v:
IEEE Transactions on Device and Materials Reliability. 17:763-772
A test chip for studying electromigration (EM) effects under various dc and ac stress conditions was implemented in a 32-nm-high-k metal gate process. The stress current, which can be either dc, pulsed dc, square ac, or real ac, was generated on-chip
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e329b407cb6e9cfbe4ee67433f9652e2
https://doi.org/10.1109/tdmr.2017.2772193
https://doi.org/10.1109/tdmr.2017.2772193
Publikováno v:
2019 41st Annual EOS/ESD Symposium (EOS/ESD).
Electrical connectors can get static charges during handling and discharge on a printed circuit board when assembled. The rise time and shape of the discharge current waveform is studied with simulation and measurement methods. Results predicts that
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::bbe7c9f736ea0d789ae20d54a83d3bc4
https://doi.org/10.23919/eos/esd.2019.8869966
https://doi.org/10.23919/eos/esd.2019.8869966
Autor:
Richard Wong, Friedrich zur Nieden, Reinhold Gartner, Pasi Tamminen, Rita Fung, Toni Viheriakoski
Publikováno v:
2019 41st Annual EOS/ESD Symposium (EOS/ESD).
ESD sensitive devices inside protective packaging may be exposed to high stress levels outside ESD protected area. ESD shielding bags are therefore tested with realistic stress levels by a system level ESD generator. The aim of this study is to estim
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::92db62b6bf018a64609afa78bb6b77b4
https://doi.org/10.23919/eos/esd.2019.8869964
https://doi.org/10.23919/eos/esd.2019.8869964