Zobrazeno 1 - 10
of 15
pro vyhledávání: '"Rimas Avizienis"'
Autor:
Po-Hung Chen, Hanh-Phuc Le, Brian Richards, Pi-Feng Chiu, Milovan Blagojević, Elad Alon, James Dunn, Nicholas Sutardja, Jaehwa Kwak, Ben Keller, Yunsup Lee, Palmer Dabbelt, Rimas Avizienis, Stevo Bailey, Andreia Cathelin, Alberto Puggelli, Andrei Vladimirescu, Brian Zimmer, Philippe Flatresse, Andrew Waterman, Colin Schmidt, Ruzica Jevtic, Martin Cochet, Krste Asanovic, Borivoje Nikolic
Publikováno v:
Integrated Circuits and Systems ISBN: 9783030394950
Improving the energy efficiency of processor systems-on-chip (SoCs) is key to improving their performance and utility. The FD-SOI silicon process enables integrated systems that can deliver dramatic improvements in energy efficiency through system in
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::57d8006d43be18490af2e59525ebf897
https://doi.org/10.1007/978-3-030-39496-7_11
https://doi.org/10.1007/978-3-030-39496-7_11
Publikováno v:
DSN (Supplements)
The first processor to detect errors and to initiate recovery of a computing system was the TARP (Test-And-Repair-Processor) of the JPL-STAR (Self-Testing-And-Repairing) computer. The STAR-Guardian (SG) is a successor of the TARP. The SG is a network
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4aea376e8679a818190d62e1764082b4
https://doi.org/10.1109/dsn-s.2019.00009
https://doi.org/10.1109/dsn-s.2019.00009
Autor:
Andrew Waterman, Yunsup Lee, Alberto Puggelli, Philippe Flatresse, Po-Hung Chen, Brian Richards, Krste Asanovic, Ben Keller, Borivoje Nikolic, Steven Bailey, Elad Alon, Rimas Avizienis, Jaehwa Kwak, Ruzica Jevtic, Nicholas Sutardja, Hanh-Phuc Le, Pi-Feng Chiu, Brian Zimmer, Milovan Blagojevic
Publikováno v:
IEEE Journal of Solid-State Circuits, vol 51, iss 4
This work demonstrates a RISC-V vector microprocessor implemented in 28 nm FDSOI with fully integrated simultaneous-switching switched-capacitor DC-DC (SC DC-DC) converters and adaptive clocking that generates four on-chip voltages between 0.45 and 1
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::470d51f062eff1134bbcee301abae8b7
https://doi.org/10.1109/jssc.2016.2519386
https://doi.org/10.1109/jssc.2016.2519386
Autor:
Krste Asanovic, Bora Nikolic, David A. Patterson, Yunsup Lee, Jaehwa Kwak, Andrew Waterman, Elad Alon, Ben Keller, Henry Cook, Ruzica Jevtic, Stevo Bailey, Alberto Puggelli, Brian Richards, Pi-Feng Chiu, Jonathan Bachrach, Brian Zimmer, Milovan Blagojevic, Rimas Avizienis
Publikováno v:
IEEE Micro. 36:8-20
The final phase of CMOS technology scaling provides continued increases in already vast transistor counts, but only minimal improvements in energy efficiency, thus requiring innovation in circuits and architectures. However, even huge teams are strug
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::66511acfa01e28eb38c8ca3bae16bd9f
https://doi.org/10.1109/mm.2016.11
https://doi.org/10.1109/mm.2016.11
Autor:
Krste Asanovic, Yunsup Lee, Derek Lockhart, Richard Xia, Christopher Batten, Rimas Avizienis, Alex Bishara
Publikováno v:
ISCA
We present a taxonomy and modular implementation approach for data-parallel accelerators, including the MIMD, vector-SIMD, subword-SIMD, SIMT, and vector-thread (VT) architectural design patterns. We introduce Maven, a new VT microarchitecture based
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::8b3cd52f263010befad938c50da91a4f
https://doi.org/10.1145/2518037.2491464
https://doi.org/10.1145/2518037.2491464
Autor:
Krste Asanovic, Rajesh Kumar, Jason S. Orcutt, Rimas Avizienis, Mark T. Wade, Andrew Waterman, Albert Ou, Vladimir Stojanovic, Jeffrey M. Shainline, Benjamin Moss, Rajeev J. Ram, Yunsup Lee, Chen Sun, Milos A. Popovic, Amir H. Atabaki, Jonathan Leu, Yu-Hsin Chen, Sen Lin, Fabio Pavanello, Luca Alloatti, Michael Georgas, Henry Cook
Publikováno v:
OFC
In this work, we provide an overview of the technology and architecture of a microprocessor chip with optical I/O. Zero-change photonics integration enabled the chip to be fabricated in a commercial electronics CMOS foundry.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9ab62125dfcc5126b07bcc356716f09c
https://doi.org/10.1364/ofc.2017.w1a.1
https://doi.org/10.1364/ofc.2017.w1a.1
Publikováno v:
DSN Workshops
This paper presents the architectural concept of a digital system that can be attached as an infrastructure to a "Client" system to enhance its resilience. This system, called "Resilience Infrastructure" RI, has four attributes. First, the RI is stru
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1b50763d83510c5f43d0d582f7ca4b17
https://doi.org/10.1109/dsn-w.2016.59
https://doi.org/10.1109/dsn-w.2016.59
Autor:
Luca Alloatti, Jeffrey M. Shainline, Amir H. Atabaki, Michael Georgas, Sen Lin, Fabio Pavanello, Mark T. Wade, Albert Ou, Krste Asanovic, Vladimir Stojanovic, Rimas Avizienis, Jason S. Orcutt, Yunsup Lee, Rajesh Kumar, Milos A. Popovic, Andrew Waterman, Jonathan Leu, Rajeev J. Ram, Yu-Hsin Chen, Benjamin Moss, Chen Sun, Henry Cook
Publikováno v:
Sun, C; Wade, MT; Lee, Y; Orcutt, JS; Alloatti, L; Georgas, MS; et al.(2015). Single-chip microprocessor that communicates directly using light. Nature, 528(7583), 534-538. doi: 10.1038/nature16454. UC Berkeley: Retrieved from: http://www.escholarship.org/uc/item/4dh1v4px
An electronic–photonic microprocessor chip manufactured using a conventional microelectronics foundry process is demonstrated; the chip contains 70 million transistors and 850 photonic components and directly uses light to communicate to other chip
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::85cbc4ea7a6c7b609b1bb53185f22726
https://pubmed.ncbi.nlm.nih.gov/26701048
https://pubmed.ncbi.nlm.nih.gov/26701048
Autor:
Krste Asanovic, Borivoje Nikolic, Rimas Avizienis, Ruzica Jevtic, Elad Alon, Pi-Feng Chiu, Andrew Waterman, Jaehwa Kwak, Henry Cook, Ben Keller, Brian Richards, Alberto Puggelli, Brian Zimmer, Milovan Blagojevic, Yunsup Lee, Stevo Bailey
Publikováno v:
Hot Chips Symposium
This article consists of a collection of slides from the authors' conference presentation. The topics discussed included: Motivation/Raven Project Goals; On-Chip Switched Capacitor DC-DC Converters; Raven3 Chip Architecture; Raven3 Implementation; Ra
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::01fb37fee72be67793ed981c7eaf1fa1
https://doi.org/10.1109/hotchips.2015.7477469
https://doi.org/10.1109/hotchips.2015.7477469
Autor:
Hanh-Phuc Le, Po-Hung Chen, Rimas Avizienis, Pi-Feng Chiu, Stevo Bailey, Krste Asanovic, Brian Richards, Ben Keller, Ruzica Jevtic, Brian Zimmer, Borivoje Nikolic, Nicholas Sutardja, Elad Alon, Yunsup Lee, Milovan Blagojevic, Jaehwa Kwak, Andrew Waterman, Alberto Puggelli, Philippe Flatresse
Publikováno v:
VLSIC
This work demonstrates a RISC-V vector microprocessor implemented in 28nm FDSOI with fully-integrated non-interleaved switched-capacitor DCDC (SC-DCDC) converters and adaptive clocking that generates four on-chip voltages between 0.5V and 1V using on
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::20d279110d52ce2eff44f8000156df88
https://doi.org/10.1109/vlsic.2015.7231305
https://doi.org/10.1109/vlsic.2015.7231305