Zobrazeno 1 - 10
of 14
pro vyhledávání: '"Reza Talebiyan"'
Publikováno v:
Veterinary Medicine International, Vol 2014 (2014)
Externí odkaz:
https://doaj.org/article/60f769b9fa7d467f9c7a52e2973ab635
Publikováno v:
2021 International Conference on Advanced Computer Applications (ACA).
Publikováno v:
2021 1st Babylon International Conference on Information Technology and Science (BICITS).
Object detection and tracking one of the most important areas of research due to routine change in motion of object and variation in scene size, occlusions, appearance variations, and ego-motion and illumination changes. Specifically, feature selecti
Autor:
Seyed Reza Talebiyan, Safiyeh Nikkhahsani, Imamreza internationaluniversity, Mashhad, Iran, Tara Tavakoli, Nastaran Parvin
Publikováno v:
International Journal of Engineering and Technology. 9:67-70
Publikováno v:
Analele Universităţii "Dunărea de Jos" Galaţi: Fascicula III, Electrotehnică, Electronică, Automatică, Informatică, Vol 32, Iss 1, Pp 37-41 (2009)
Pipeline FFT processors are used in mobile communication systems and in particular in OFDM-based systems. This paper presents a method for power analysis of pipeline FFT processors. This method applies to various architectures with different radices.
Publikováno v:
Scopus-Elsevier
Aim The aim of this investigation was to determine the tooth size ratio in an Iranian-Azari population. Method and Materials The Bolton tooth size analysis was performed on a sample of 50 plaster models (25 male subjects, 25 female subjects) of Irani
Publikováno v:
2015 International Congress on Technology, Communication and Knowledge (ICTCK).
This paper presents a new structure of 1-bit full adder for sub-threshold technology. It compares full adder sub-circuits and also compares the proposed full adder with common full adders in terms of propagation delay, power consumption, power delay
Publikováno v:
2015 International Congress on Technology, Communication and Knowledge (ICTCK).
This paper, presents a new design for 1-bit full adder cell using hybrid-CMOS logic style. The new full adder is based on a novel XOR-XNOR circuit that generates XOR and XNOR full-swing outputs simultaneously and outperforms its best counterpart show
Publikováno v:
Kafkas Universitesi Veteriner Fakultesi Dergisi.
Publikováno v:
Ciência e Natura. 37:312
In this paper a new array multiplier has been proposed, which has lower power consumption than the regular array multipliers. This technique has been applied on two conventional and leapfrog array multipliers. In the formation of 8×8 multiplier all